myhdl-list

[myhdl-list] Beginner Question: Loop Unrolling & Use of Tuple Elements

[<co...@ne...>]

Hello,

I was attempting to make a simple FIR filter to compare MyHDL to previous
work I'd done using Vivado C-based HLS. I'm basing this entirely on
Christopher Felton's IIR example from
https://bitbucket.org/cfelton/examples/src/tip/siir/siir.py . 

Two things have tripped me up, and I'm not sure if it's some limitation of
MyHDL or my own failures? The first is as part of the FIR I'd like to have a
line like this:

@always(clk.posedge)
def rtl_fir():
   for i in range(0, len(B-1)):
      ffd[i+1].next = ffd[i]
      ffd[i].next = x

But I can't seem to find references to loop unrolling anywhere? There was a
few threads from ~2008 was all I saw. Instead I end up having to do
something like this:

@always(clk.posedge)
    def rtl_fir():
        ffd[4].next = ffd[3]
        ffd[3].next = ffd[2]
        ffd[2].next = ffd[1]
        ffd[1].next = ffd[0]
        ffd[0].next = x

Which I could have another chunk of python auto-generate, but seems silly.
Is there some loop unrolling mechanism I'm missing?

The second problem is for the accumulator (which again I'm manually
unrolling), the most straight-forward definition to me would look like this:

@always_comb
    def rtl_acc():        
        # Double precision accumulator
        yacc.next = B[0]*ffd[0] + B[1]*ffd[1] + B[2]*ffd[2] + B[3]*ffd[3] +
B[4]*ffd[4]

As get an error about use of tuples. Instead I've got to assign each element
(which is an int() type) to another variable and use that:

    b0 = B[0]
    b1 = B[1]
    b2 = B[2]
    b3 = B[3]
    b4 = B[4]

    @always_comb
    def rtl_acc():        
        # Double precision accumulator
        yacc.next = b0*ffd[0] + b1*ffd[1] + b2*ffd[2] + b3*ffd[3] +
b4*ffd[4]

The full code is at http://pastebin.com/E2i16whb (which again is just a
hacked version of Christopher's code that does FIR instead, I didn't finish
changing some of the names).

Is this something I'm doing incorrectly which stops me from using MyHDL in
such a manner?

Thanks,

  -Colin O'Flynn

Re: [myhdl-list] Beginner Question: Loop Unrolling & Use of Tuple Elements

[Christopher F. <chr...@gm...>]

Hey Collin, how are things going?

On 6/28/15 12:59 PM, co...@ne... wrote:
> Hello,
>
> I was attempting to make a simple FIR filter to compare MyHDL to previous
> work I'd done using Vivado C-based HLS. I'm basing this entirely on
> Christopher Felton's IIR example from
> https://bitbucket.org/cfelton/examples/src/tip/siir/siir.py .
>
> Two things have tripped me up, and I'm not sure if it's some limitation of
> MyHDL or my own failures? The first is as part of the FIR I'd like to have a
> line like this:
>
> @always(clk.posedge)
> def rtl_fir():
>     for i in range(0, len(B-1)):
>        ffd[i+1].next = ffd[i]
>        ffd[i].next = x
>
> But I can't seem to find references to loop unrolling anywhere? There was a
> few threads from ~2008 was all I saw. Instead I end up having to do
> something like this:

The MyHDL converter will not un-roll the loops
(currently).  The loops will be converted as loops
to the target HDL - where they will be un-rolled
by the synthesizer.

This post:
http://www.fpgarelated.com/showarticle/631.php

shows a "naive" (non-target-optimized) FIR
implementation using loops.

<snip>
> The second problem is for the accumulator (which again I'm manually
> unrolling), the most straight-forward definition to me would look like this:
>
> @always_comb
>      def rtl_acc():
>          # Double precision accumulator
>          yacc.next = B[0]*ffd[0] + B[1]*ffd[1] + B[2]*ffd[2] + B[3]*ffd[3] +
> B[4]*ffd[4]

I think the above link will help here as well,
when you create a tuple of ints, it is converted
as a ROM [1], what you need to do is:

     def rtl_acc():
         for ii in range(4):
             btmp = B[ii]
             yacc.next = btmp + fdd[ii]


Hope that helps,
Chris

[1] 
http://docs.myhdl.org/en/latest/manual/conversion_examples.html#rom-inference

Re: [myhdl-list] Beginner Question: Loop Unrolling & Use of Tuple Elements

[<co...@ne...>]

Hello,

Things are well! Not sure if you'll be back at ESC-SV, but if so will buy
you a beer or three for the helpful response there ;-)

Those answers solve my problems, so am back on track. Am planning on having
a small write-up for Circuit Cellar on MyHDL, just replicating the simple
FIR demo I did before. Of course the MyHDL version is nicer since it can use
scipy to generate the coefficients and compare results...

Warm Regards,

  -Colin O'Flynn

-----Original Message-----
From: Christopher Felton [mailto:chr...@gm...] 
Sent: June-28-15 4:32 PM
To: myh...@li...
Subject: Re: [myhdl-list] Beginner Question: Loop Unrolling & Use of Tuple
Elements

Hey Collin, how are things going?

On 6/28/15 12:59 PM, co...@ne... wrote:
> Hello,
>
> I was attempting to make a simple FIR filter to compare MyHDL to 
> previous work I'd done using Vivado C-based HLS. I'm basing this 
> entirely on Christopher Felton's IIR example from 
> https://bitbucket.org/cfelton/examples/src/tip/siir/siir.py .
>
> Two things have tripped me up, and I'm not sure if it's some 
> limitation of MyHDL or my own failures? The first is as part of the 
> FIR I'd like to have a line like this:
>
> @always(clk.posedge)
> def rtl_fir():
>     for i in range(0, len(B-1)):
>        ffd[i+1].next = ffd[i]
>        ffd[i].next = x
>
> But I can't seem to find references to loop unrolling anywhere? There 
> was a few threads from ~2008 was all I saw. Instead I end up having to 
> do something like this:

The MyHDL converter will not un-roll the loops (currently).  The loops will
be converted as loops to the target HDL - where they will be un-rolled by
the synthesizer.

This post:
http://www.fpgarelated.com/showarticle/631.php

shows a "naive" (non-target-optimized) FIR implementation using loops.

<snip>
> The second problem is for the accumulator (which again I'm manually 
> unrolling), the most straight-forward definition to me would look like
this:
>
> @always_comb
>      def rtl_acc():
>          # Double precision accumulator
>          yacc.next = B[0]*ffd[0] + B[1]*ffd[1] + B[2]*ffd[2] + 
> B[3]*ffd[3] + B[4]*ffd[4]

I think the above link will help here as well, when you create a tuple of
ints, it is converted as a ROM [1], what you need to do is:

     def rtl_acc():
         for ii in range(4):
             btmp = B[ii]
             yacc.next = btmp + fdd[ii]


Hope that helps,
Chris

[1]
http://docs.myhdl.org/en/latest/manual/conversion_examples.html#rom-inferenc
e


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Re: [myhdl-list] Beginner Question: Loop Unrolling & Use of Tuple Elements

[Christopher F. <chr...@gm...>]

On 6/28/2015 6:51 PM, co...@ne... wrote:
> Hello,
>
> Things are well! Not sure if you'll be back at ESC-SV, but if so will buy
> you a beer or three for the helpful response there ;-)

I will not make it to ESC-SV this year (or any of
the ESC bonanzas).

>
> Those answers solve my problems, so am back on track. Am planning on having
> a small write-up for Circuit Cellar on MyHDL, just replicating the simple
> FIR demo I did before. Of course the MyHDL version is nicer since it can use
> scipy to generate the coefficients and compare results...

Sounds fun, let us know if you have any other
questions or issues.  Also, let us know when it is
published.

Regards,
Chris

Re: [myhdl-list] Beginner Question: Loop Unrolling & Use of Tuple Elements

[Christopher F. <chr...@gm...>]

On 6/28/2015 6:51 PM, co...@ne... wrote:
> Hello,
>
> Things are well! Not sure if you'll be back at ESC-SV, but if so will buy
> you a beer or three for the helpful response there ;-)
>
> Those answers solve my problems, so am back on track. Am planning on having
> a small write-up for Circuit Cellar on MyHDL, just replicating the simple
> FIR demo I did before. Of course the MyHDL version is nicer since it can use
> scipy to generate the coefficients and compare results...
>
> Warm Regards,
>
>    -Colin O'Flynn
>

Colin,

I noticed in my email the latest CC has your article:

     PROGRAMMABLE LOGIC IN PRACTICE, Rapid FPGA Design in
     Python using MyHDL.


Congratulations, I haven't read it yet, hope to get to
it soon.

Regards,
Chris