myhdl-list

[myhdl-list] Simulation control

[Juan P. C. <jp...@gm...>]

Hi,

I was wondering if there was a way to 1) pause a simulation by setting
breakpoints (toggle on signal X, or similar), 2) changing the state of
signals manually during pause and 3) resuming?

Thank you,

JP

Re: [myhdl-list] Simulation control

[Christopher F. <chr...@gm...>]

On 4/4/15 6:39 PM, Juan Pablo Caram wrote:
> Hi,
>
> I was wondering if there was a way to 1) pause a simulation by setting
> breakpoints (toggle on signal X, or similar), 2) changing the state of
> signals manually during pause and 3) resuming?
>

You should be able to use any Python debugger
(pdb) to do this.  I personally have not tried
it, so I don't know if there are any issues.

I don't know which Python IDE works well with
the Python debugger (maybe others have
suggestions?).  I have heard PyCharm mentioned
before?

Regards,
Chris

Re: [myhdl-list] Simulation control

[Christopher F. <chr...@gm...>]

On 4/4/15 9:08 PM, Christopher Felton wrote:
> On 4/4/15 6:39 PM, Juan Pablo Caram wrote:
>> Hi,
>>
>> I was wondering if there was a way to 1) pause a simulation by setting
>> breakpoints (toggle on signal X, or similar), 2) changing the state of
>> signals manually during pause and 3) resuming?
>>
>
> You should be able to use any Python debugger
> (pdb) to do this.  I personally have not tried
> it, so I don't know if there are any issues.

I just tried PyCharm and it is fairly straightforward
to set breakpoints in a simulation, step, inspect,
etc.  I am sure there are many different Python
debug interfaces (command line pdb probably works
fine as well).

Regards,
Chris

Re: [myhdl-list] Simulation control

[Jose M. G. C. <ch...@gm...>]

I use eclipse with PyDev or Aptana which is the out-of-the-box version, and it works quite well.

Best,

Jose M.

> El 05/04/2015, a las 04:33, Christopher Felton <chr...@gm...> escribió:
> 
>> On 4/4/15 9:08 PM, Christopher Felton wrote:
>>> On 4/4/15 6:39 PM, Juan Pablo Caram wrote:
>>> Hi,
>>> 
>>> I was wondering if there was a way to 1) pause a simulation by setting
>>> breakpoints (toggle on signal X, or similar), 2) changing the state of
>>> signals manually during pause and 3) resuming?
>> 
>> You should be able to use any Python debugger
>> (pdb) to do this.  I personally have not tried
>> it, so I don't know if there are any issues.
> 
> I just tried PyCharm and it is fairly straightforward
> to set breakpoints in a simulation, step, inspect,
> etc.  I am sure there are many different Python
> debug interfaces (command line pdb probably works
> fine as well).
> 
> Regards,
> Chris
> 
> 
> 
> ------------------------------------------------------------------------------
> Dive into the World of Parallel Programming The Go Parallel Website, sponsored
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Re: [myhdl-list] Simulation control

[Euripedes R. F. <roc...@gm...>]

I had some debug of simulation(also cosimulation) using pudb without any
problems so far.

2015-04-05 3:12 GMT-03:00 Jose M. Gomez Cama <ch...@gm...>:

> I use eclipse with PyDev or Aptana which is the out-of-the-box version,
> and it works quite well.
>
> Best,
>
> Jose M.
>
> > El 05/04/2015, a las 04:33, Christopher Felton <chr...@gm...>
> escribió:
> >
> >> On 4/4/15 9:08 PM, Christopher Felton wrote:
> >>> On 4/4/15 6:39 PM, Juan Pablo Caram wrote:
> >>> Hi,
> >>>
> >>> I was wondering if there was a way to 1) pause a simulation by setting
> >>> breakpoints (toggle on signal X, or similar), 2) changing the state of
> >>> signals manually during pause and 3) resuming?
> >>
> >> You should be able to use any Python debugger
> >> (pdb) to do this.  I personally have not tried
> >> it, so I don't know if there are any issues.
> >
> > I just tried PyCharm and it is fairly straightforward
> > to set breakpoints in a simulation, step, inspect,
> > etc.  I am sure there are many different Python
> > debug interfaces (command line pdb probably works
> > fine as well).
> >
> > Regards,
> > Chris
> >
> >
> >
> >
> ------------------------------------------------------------------------------
> > Dive into the World of Parallel Programming The Go Parallel Website,
> sponsored
> > by Intel and developed in partnership with Slashdot Media, is your hub
> for all
> > things parallel software development, from weekly thought leadership
> blogs to
> > news, videos, case studies, tutorials and more. Take a look and join the
> > conversation now. http://goparallel.sourceforge.net/
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> > myhdl-list mailing list
> > myh...@li...
> > https://lists.sourceforge.net/lists/listinfo/myhdl-list
>
>
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> by Intel and developed in partnership with Slashdot Media, is your hub for
> all
> things parallel software development, from weekly thought leadership blogs
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Re: [myhdl-list] Simulation control

[Juan P. C. <jp...@gm...>]

I apologize for the confusion. I'm hoping to do do this with code, not a
debugger. I'm trying to create a mixed signal simulator exchanging data
between ngspice and myhdl.

I would like to be able to simulate until signal X toggles or changes, get
the time, run spice until this time is reached, update signals in myhdl and
spice, resume myhdl simulation, etc.

Sometimes the clock comes from spice, I detect the change in output from a
comparator, stop the simulation, and must toggle the corresponding signal
in the digital side and resume the digital.

I couldn't find any fine controls for the simulation in MyHDL. SimPy, that
looks quite similar in terms of using generators, seem to have "simulate
until" kind of controls. I wonder if this is already possible or if someone
had tried to implement such functionality.

Thanks,

JP

On Sun, Apr 5, 2015 at 2:28 PM, Euripedes Rocha Filho <
roc...@gm...> wrote:

> I had some debug of simulation(also cosimulation) using pudb without any
> problems so far.
>
> 2015-04-05 3:12 GMT-03:00 Jose M. Gomez Cama <ch...@gm...>:
>
>> I use eclipse with PyDev or Aptana which is the out-of-the-box version,
>> and it works quite well.
>>
>> Best,
>>
>> Jose M.
>>
>> > El 05/04/2015, a las 04:33, Christopher Felton <chr...@gm...>
>> escribió:
>> >
>> >> On 4/4/15 9:08 PM, Christopher Felton wrote:
>>
>> >>> On 4/4/15 6:39 PM, Juan Pablo Caram wrote:
>> >>> Hi,
>> >>>
>> >>> I was wondering if there was a way to 1) pause a simulation by setting
>> >>> breakpoints (toggle on signal X, or similar), 2) changing the state of
>> >>> signals manually during pause and 3) resuming?
>> >>
>> >> You should be able to use any Python debugger
>> >> (pdb) to do this.  I personally have not tried
>> >> it, so I don't know if there are any issues.
>> >
>> > I just tried PyCharm and it is fairly straightforward
>> > to set breakpoints in a simulation, step, inspect,
>> > etc.  I am sure there are many different Python
>> > debug interfaces (command line pdb probably works
>> > fine as well).
>> >
>> > Regards,
>> > Chris
>> >
>> >
>> >
>> >
>> ------------------------------------------------------------------------------
>> > Dive into the World of Parallel Programming The Go Parallel Website,
>> sponsored
>> > by Intel and developed in partnership with Slashdot Media, is your hub
>> for all
>> > things parallel software development, from weekly thought leadership
>> blogs to
>> > news, videos, case studies, tutorials and more. Take a look and join the
>> > conversation now. http://goparallel.sourceforge.net/
>> > _______________________________________________
>> > myhdl-list mailing list
>> > myh...@li...
>> > https://lists.sourceforge.net/lists/listinfo/myhdl-list
>>
>>
>> ------------------------------------------------------------------------------
>> Dive into the World of Parallel Programming The Go Parallel Website,
>> sponsored
>> by Intel and developed in partnership with Slashdot Media, is your hub
>> for all
>> things parallel software development, from weekly thought leadership
>> blogs to
>> news, videos, case studies, tutorials and more. Take a look and join the
>> conversation now. http://goparallel.sourceforge.net/
>> _______________________________________________
>> myhdl-list mailing list
>> myh...@li...
>> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>>
>
>
>
> ------------------------------------------------------------------------------
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> sponsored
> by Intel and developed in partnership with Slashdot Media, is your hub for
> all
> things parallel software development, from weekly thought leadership blogs
> to
> news, videos, case studies, tutorials and more. Take a look and join the
> conversation now. http://goparallel.sourceforge.net/
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>
>

Re: [myhdl-list] Simulation control

[Christopher F. <chr...@gm...>]

On 4/5/15 3:06 PM, Juan Pablo Caram wrote:
> I apologize for the confusion. I'm hoping to do do this with code, not a
> debugger. I'm trying to create a mixed signal simulator exchanging data
> between ngspice and myhdl.

This might be of interest:
http://old.myhdl.org/doku.php/projects:mixedmodesimulation
http://old.myhdl.org/doku.php/projects:interactive_simulation_using_ipython

>
> I would like to be able to simulate until signal X toggles or changes,
> get the time, run spice until this time is reached, update signals in
> myhdl and spice, resume myhdl simulation, etc.

Why can't you do this with the existing Python debuggers?

>
> Sometimes the clock comes from spice, I detect the change in output from
> a comparator, stop the simulation, and must toggle the corresponding
> signal in the digital side and resume the digital.
>
> I couldn't find any fine controls for the simulation in MyHDL. SimPy,
> that looks quite similar in terms of using generators, seem to have
> "simulate until" kind of controls. I wonder if this is already possible
> or if someone had tried to implement such functionality.

This control does not exist in the MyHDL simulator.
Currently, you can only instruct the simulator to
run N simulation steps: `Simulation(test()).run(1000)`

Regards,
Chris

Re: [myhdl-list] Simulation control

[Juan P. C. <jp...@gm...>]

Hi Christopher,

The link on "mixed mode" simulation is a proof of concept, but very naive.
I've put together a blog post discussing the difficulties that one might
find:

http://caram.cl/developing-a-mixed-signal-simulator

The link about interactive simulation is more along the lines of what would
be required, but using the function calls, not the interactive console. I
see it's using a debugger and that might make it extremely slow. It would
be ideal if this functionality was built into the simulator. If I were to
implement this functionality into the simulator, any idea on where I should
start? I haven't seen any documentation about the operation of the
simulator.

Thanks,

JP

On Mon, Apr 6, 2015 at 8:24 AM, Christopher Felton <chr...@gm...>
wrote:

> On 4/5/15 3:06 PM, Juan Pablo Caram wrote:
> > I apologize for the confusion. I'm hoping to do do this with code, not a
> > debugger. I'm trying to create a mixed signal simulator exchanging data
> > between ngspice and myhdl.
>
> This might be of interest:
> http://old.myhdl.org/doku.php/projects:mixedmodesimulation
> http://old.myhdl.org/doku.php/projects:interactive_simulation_using_ipython
>
> >
> > I would like to be able to simulate until signal X toggles or changes,
> > get the time, run spice until this time is reached, update signals in
> > myhdl and spice, resume myhdl simulation, etc.
>
> Why can't you do this with the existing Python debuggers?
>
> >
> > Sometimes the clock comes from spice, I detect the change in output from
> > a comparator, stop the simulation, and must toggle the corresponding
> > signal in the digital side and resume the digital.
> >
> > I couldn't find any fine controls for the simulation in MyHDL. SimPy,
> > that looks quite similar in terms of using generators, seem to have
> > "simulate until" kind of controls. I wonder if this is already possible
> > or if someone had tried to implement such functionality.
>
> This control does not exist in the MyHDL simulator.
> Currently, you can only instruct the simulator to
> run N simulation steps: `Simulation(test()).run(1000)`
>
> Regards,
> Chris
>
>
>
>
>
>
> ------------------------------------------------------------------------------
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Re: [myhdl-list] Simulation control

[Juan P. C. <jp...@gm...>]

Henry,

How did you get away with running two simulations at the same time. MyHDL
uses global variables. I tried an approach with threads and as soon as I
start the 2nd simulation, the 1st one is messed up.

Thanks,

JP

On Tue, Apr 7, 2015 at 12:33 PM, Henry Gomersall <he...@ca...> wrote:

> On 07/04/15 15:56, Juan Pablo Caram wrote:
> > The link on "mixed mode" simulation is a proof of concept, but very
> > naive. I've put together a blog post discussing the difficulties that
> > one might find:
> >
> > http://caram.cl/developing-a-mixed-signal-simulator
> >
> > The link about interactive simulation is more along the lines of what
> > would be required, but using the function calls, not the interactive
> > console. I see it's using a debugger and that might make it extremely
> > slow. It would be ideal if this functionality was built into the
> > simulator. If I were to implement this functionality into the
> > simulator, any idea on where I should start? I haven't seen any
> > documentation about the operation of the simulator.
>
> I read your blog post, and I still don't see what the fundamental
> problem is.
>
> In your final example, your DAC and your ADC are going to have to be
> instantaneous samplers. It doesn't make any sense otherwise. What does
> it mean to have an event in between clock edges? MyHDL doesn't have any
> concept of signal timings. If the delay means something, you need to
> model that in the analogue side; from the perspective of the RTL model,
> there is some value at some clock edge.
>
> You can model different clock domains, you just have to go the whole hog
> and run each clock domain in a different process. You'll have to define
> your time resolution and have some kind of sync barrier on each
> resolution period (using some kind of meta clock).
>
> That is, on every resolution period, each process will sync with the
> other to keep the simulations timings the same.
>
> I've written a basic example with two clocks here:
> https://gist.github.com/hgomersall/6f9268023593ca5fd9d0
>
> I'm pretty sure the synchronisation function isn't doing what it should,
> but that just needs debugging. It might be easier to use Threading, but
> I'm not sure if MyHDL is safe for that (I don't know if there is any
> global shared state).
>
> Cheers,
> Henry
>
>
> ------------------------------------------------------------------------------
> BPM Camp - Free Virtual Workshop May 6th at 10am PDT/1PM EDT
> Develop your own process in accordance with the BPMN 2 standard
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Re: [myhdl-list] Simulation control

[Henry G. <he...@ca...>]

On 10/04/15 22:57, Juan Pablo Caram wrote:
> How did you get away with running two simulations at the same time. 
> MyHDL uses global variables. I tried an approach with threads and as 
> soon as I start the 2nd simulation, the 1st one is messed up.
>

They're run as separate processes, which have no implicit shared state.

Check out the code, which uses the multiprocess package.

Cheers,

Henry

Re: [myhdl-list] Simulation control

[Henry G. <he...@ca...>]

On 05/04/15 21:06, Juan Pablo Caram wrote:
> I would like to be able to simulate until signal X toggles or changes, 
> get the time, run spice until this time is reached, update signals in 
> myhdl and spice, resume myhdl simulation, etc.
>

You can always have your own MyHDL generator instance that does 
programmatic control. In each call, it just checks some IO and does 
something suitable. Remember, you have the full power of Python 
available to the running code.

So, you just run the simulator forever, handling state changes from 
whatever external source you want inside the running code, and then when 
you want to stop, raise StopSimulation. It could even be a real physical 
source if you wanted :)

If anything, programmatic control is much easier, since that's what 
programming languages are for!

cheers,
Henry

Re: [myhdl-list] Simulation control

[Juan P. C. <jp...@gm...>]

I don't have a clear idea for the architecture yet, but I suspect it is not
that simple (or maybe it is)...

This is what I understand you are referring to:

def myADC(value):
  @always(clk.posedge)
  def logic():
    value.next = do_things()

And then in do_things() control the spice simulator. In this case, the
spice simulator runs "behind" the digital simulation, this is, when myhdl
gets to t=ti, stop and sun spice until t=ti.

The problem is that I might need to stop for different signals, and having
them all call do_things() makes having a centralized control of the
mixed-signal simulation environment very complicated. On top of this, how
can I know them "time" at which the signal toggle inside the "logic()"
function"? I would need that to determine for how long to run the analog
simulation.

Even worse, what if "clk" came from the analog simulation... I would have
to wait for each analog run complete to know when to toggle it, and then
manually toggle it. Here, the myhdl simulation would run "behind".

For short, I don't think I can implement the control of the whole system
from a single "do_things()" function. What do you think?

Thanks,

JP



On Sun, Apr 5, 2015 at 5:43 PM, Henry Gomersall <he...@ca...> wrote:

> On 05/04/15 21:06, Juan Pablo Caram wrote:
> > I would like to be able to simulate until signal X toggles or changes,
> > get the time, run spice until this time is reached, update signals in
> > myhdl and spice, resume myhdl simulation, etc.
> >
>
> You can always have your own MyHDL generator instance that does
> programmatic control. In each call, it just checks some IO and does
> something suitable. Remember, you have the full power of Python
> available to the running code.
>
> So, you just run the simulator forever, handling state changes from
> whatever external source you want inside the running code, and then when
> you want to stop, raise StopSimulation. It could even be a real physical
> source if you wanted :)
>
> If anything, programmatic control is much easier, since that's what
> programming languages are for!
>
> cheers,
> Henry
>
>
> ------------------------------------------------------------------------------
> Dive into the World of Parallel Programming The Go Parallel Website,
> sponsored
> by Intel and developed in partnership with Slashdot Media, is your hub for
> all
> things parallel software development, from weekly thought leadership blogs
> to
> news, videos, case studies, tutorials and more. Take a look and join the
> conversation now. http://goparallel.sourceforge.net/
> _______________________________________________
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> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>

Re: [myhdl-list] Simulation control

[Henry G. <he...@ca...>]

On 05/04/15 23:22, Juan Pablo Caram wrote:
> The problem is that I might need to stop for different signals, and 
> having them all call do_things() makes having a centralized control of 
> the mixed-signal simulation environment very complicated. On top of 
> this, how can I know them "time" at which the signal toggle inside the 
> "logic()" function"? I would need that to determine for how long to 
> run the analog simulation.
>
> Even worse, what if "clk" came from the analog simulation... I would 
> have to wait for each analog run complete to know when to toggle it, 
> and then manually toggle it. Here, the myhdl simulation would run 
> "behind".
>
> For short, I don't think I can implement the control of the whole 
> system from a single "do_things()" function. What do you think?

It's not totally clear to me what you're trying to do, but I'm yet to be 
convinced it isn't possible, and certainly yet to be convinced that 
having programmatic access to a debugging layer would be better than 
doing it all inside MyHDL.

You have a stateful spice simulator in a myhdl simulator. The myhdl code 
flips signals as desired until it needs to wait on the simulator doing 
something, then it blocks until the spice simulator reaches a suitable 
state and allows it to continue (let's say, when the virtual ADC flips a 
bit). Presumably you have inputs and outputs to your spice model? At 
some point, surely, you need virtual ADCs and DACs, so you're pretty 
limited in terms of directionality? In which case, you can set inputs as 
you wish and then block on outputs (or output sets).

I don't see the problem with clk - in your clock driver, you just block 
until the spice simulator has moved to the correct state.

Are you trying to do your myhdl logic in an asynchronous way? Or do you 
want sub-cycle times to be somehow meaningful between spice and myhdl (I 
don't have any idea what this could be)?

If you need to run the spice model and the myhdl simulation 
concurrently, you can do so in different threads.

cheers,

Henry

Re: [myhdl-list] Simulation control

[Juan P. C. <jp...@gm...>]

Henry,

Yes, I want to support asynchronous events. That's where mixed-signal
circuits get interesting. I would appreciate if you would take a look at
the blog post I put together describing some complexities in this:
http://caram.cl/developing-a-mixed-signal-simulator

Besides the ADCs and DACs, there can be comparators. ADC/DACs are clocked
from the HDL side, i.e. they are synchronous, while a comparator can toggle
at any time depending on the instantaneous analog value.

In terms of time step in myHDL, I believe setting it to be small enough
should suffice. No sub-step support required. When a spice event occurs,
the digital side can react on the next time step.

Perhaps I could run the myHDL simulator in a separate thread, and having it
block inside the function(s) that toggle the signal of interest until a
message (via queues) is received from the main thread is received. That way
I could regain control, like with a debugger, but without the performance
penalty. And wouldn't need to modify the simulator.

Thanks,

JP

On Mon, Apr 6, 2015 at 3:47 AM, Henry Gomersall <he...@ca...> wrote:

> On 05/04/15 23:22, Juan Pablo Caram wrote:
> > The problem is that I might need to stop for different signals, and
> > having them all call do_things() makes having a centralized control of
> > the mixed-signal simulation environment very complicated. On top of
> > this, how can I know them "time" at which the signal toggle inside the
> > "logic()" function"? I would need that to determine for how long to
> > run the analog simulation.
> >
> > Even worse, what if "clk" came from the analog simulation... I would
> > have to wait for each analog run complete to know when to toggle it,
> > and then manually toggle it. Here, the myhdl simulation would run
> > "behind".
> >
> > For short, I don't think I can implement the control of the whole
> > system from a single "do_things()" function. What do you think?
>
> It's not totally clear to me what you're trying to do, but I'm yet to be
> convinced it isn't possible, and certainly yet to be convinced that
> having programmatic access to a debugging layer would be better than
> doing it all inside MyHDL.
>
> You have a stateful spice simulator in a myhdl simulator. The myhdl code
> flips signals as desired until it needs to wait on the simulator doing
> something, then it blocks until the spice simulator reaches a suitable
> state and allows it to continue (let's say, when the virtual ADC flips a
> bit). Presumably you have inputs and outputs to your spice model? At
> some point, surely, you need virtual ADCs and DACs, so you're pretty
> limited in terms of directionality? In which case, you can set inputs as
> you wish and then block on outputs (or output sets).
>
> I don't see the problem with clk - in your clock driver, you just block
> until the spice simulator has moved to the correct state.
>
> Are you trying to do your myhdl logic in an asynchronous way? Or do you
> want sub-cycle times to be somehow meaningful between spice and myhdl (I
> don't have any idea what this could be)?
>
> If you need to run the spice model and the myhdl simulation
> concurrently, you can do so in different threads.
>
> cheers,
>
> Henry
>
>
> ------------------------------------------------------------------------------
> BPM Camp - Free Virtual Workshop May 6th at 10am PDT/1PM EDT
> Develop your own process in accordance with the BPMN 2 standard
> Learn Process modeling best practices with Bonita BPM through live
> exercises
> http://www.bonitasoft.com/be-part-of-it/events/bpm-camp-virtual-
> event?utm_
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>

Re: [myhdl-list] Simulation control

[Jan C. <th...@mu...>]

On Sun, 5 Apr 2015 18:22:51 -0400
Juan Pablo Caram <jp...@gm...> wrote:

> I don't have a clear idea for the architecture yet, but I suspect it is not
> that simple (or maybe it is)...
> 
> This is what I understand you are referring to:
> 
> def myADC(value):
>   @always(clk.posedge)
>   def logic():
>     value.next = do_things()

I'm doing a CDP1802 processor, and want full debug control to hookup
with software tools. I also wanted it to have the same interface 
whether in simulation or on FPGA. 

Since small cheap FPGA boards generally have a FTDI comm port, the 
interface is based around byte streams.  In simulation the byte stream 
is crudely connected via mmap'd files.  

This allows connection of the hardware or simulation to the support 
tools in other languages, provided it is possible to use mmap in 
those environments, or build a linking module. 

Would any details of this help?

Jan Coombs
-- 
email valid, else fix at dots and hyphen
jan4myhdlatmurrayhyphenmicroftdotcodotuk

Re: [myhdl-list] Simulation control

[Juan P. C. <jp...@gm...>]

Hi Jan,

Yes, I would be interested in learning what you did.

Thanks,

JP

On Mon, Apr 6, 2015 at 6:04 AM, Jan Coombs <th...@mu...> wrote:

> On Sun, 5 Apr 2015 18:22:51 -0400
> Juan Pablo Caram <jp...@gm...> wrote:
>
> > I don't have a clear idea for the architecture yet, but I suspect it is
> not
> > that simple (or maybe it is)...
> >
> > This is what I understand you are referring to:
> >
> > def myADC(value):
> >   @always(clk.posedge)
> >   def logic():
> >     value.next = do_things()
>
> I'm doing a CDP1802 processor, and want full debug control to hookup
> with software tools. I also wanted it to have the same interface
> whether in simulation or on FPGA.
>
> Since small cheap FPGA boards generally have a FTDI comm port, the
> interface is based around byte streams.  In simulation the byte stream
> is crudely connected via mmap'd files.
>
> This allows connection of the hardware or simulation to the support
> tools in other languages, provided it is possible to use mmap in
> those environments, or build a linking module.
>
> Would any details of this help?
>
> Jan Coombs
> --
> email valid, else fix at dots and hyphen
> jan4myhdlatmurrayhyphenmicroftdotcodotuk
>
>
>
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Re: [myhdl-list] Simulation control

[Henry G. <he...@ca...>]

On 07/04/15 15:56, Juan Pablo Caram wrote:
> The link on "mixed mode" simulation is a proof of concept, but very 
> naive. I've put together a blog post discussing the difficulties that 
> one might find:
>
> http://caram.cl/developing-a-mixed-signal-simulator
>
> The link about interactive simulation is more along the lines of what 
> would be required, but using the function calls, not the interactive 
> console. I see it's using a debugger and that might make it extremely 
> slow. It would be ideal if this functionality was built into the 
> simulator. If I were to implement this functionality into the 
> simulator, any idea on where I should start? I haven't seen any 
> documentation about the operation of the simulator.

I read your blog post, and I still don't see what the fundamental 
problem is.

In your final example, your DAC and your ADC are going to have to be 
instantaneous samplers. It doesn't make any sense otherwise. What does 
it mean to have an event in between clock edges? MyHDL doesn't have any 
concept of signal timings. If the delay means something, you need to 
model that in the analogue side; from the perspective of the RTL model, 
there is some value at some clock edge.

You can model different clock domains, you just have to go the whole hog 
and run each clock domain in a different process. You'll have to define 
your time resolution and have some kind of sync barrier on each 
resolution period (using some kind of meta clock).

That is, on every resolution period, each process will sync with the 
other to keep the simulations timings the same.

I've written a basic example with two clocks here:
https://gist.github.com/hgomersall/6f9268023593ca5fd9d0

I'm pretty sure the synchronisation function isn't doing what it should, 
but that just needs debugging. It might be easier to use Threading, but 
I'm not sure if MyHDL is safe for that (I don't know if there is any 
global shared state).

Cheers,
Henry

Re: [myhdl-list] Simulation control

[Henry G. <he...@ca...>]

On 07/04/15 17:33, Henry Gomersall wrote:
> I'm pretty sure the synchronisation function isn't doing what it should,
> but that just needs debugging. It might be easier to use Threading, but
> I'm not sure if MyHDL is safe for that (I don't know if there is any
> global shared state).

The sync event is never cleared.

Anyway, I think that gives the basic strategy I was getting at...