Thread: [myhdl-list] Introduction and Question

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Hello everybody,

I thought I would introduce myself, since I've been monitoring this mailing
list for a few months and dabbling with MyHDL for about the same amount 
of time. I have had some success, and I am probably looking at making it 
my primary language for IP development.

My name is Daryl, and I am a graduate student at the University of Utah. A 
big focus of my research is in implementing real-time DSP algorithms for 
applications in wireless communications. To this end, I occasionally find 
myself requiring IP blocks that are not readily available to me, and I end 
up writing my own. I have had some success, but I'm still learning. I am 
extremely interested in MyHDL because of its ability for unit testing and 
incorporating Python-based algorithm code into my test benches. 
Currently, I use VHDL most heavily, although I learned HDL with Verilog. 

For various reasons, I would prefer the end product to be in VHDL. For 
this reason, I was wondering if any progress had been made regarding 
CoSimulation with GHDL? If not, is there any reason I shouldn't try to 
work on this myself (i.e., someone already knows that it won't work)?

I found this link: http://www.myhdl.org/doku.php/dev:vhdl_cosim

Which I think suggests that the VPI interface is supported although I'm not 
clear that it says that... I've never used cosimulation in VHDL or Verilog 
before, so I don't know much about it (yet). The manual for MyHDL 0.7 
says that GHDL support is not there, unless I'm misreading it. Although, 
it lists GHDL in the list of possible simulators.

Thanks and nice to meet you all,
Daryl 