Thread: [myhdl-list] co-simulation: vpi file
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From: George P. <ge...@ga...> - 2005-12-05 01:30:13
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Hi all, in the example taken from the docs below, where is the myhdl.vpi file supposed to come from?
Thanks,
George
import os
from myhdl import Cosimulation
cmd = "iverilog -o bin2gray -Dwidth=%s bin2gray.v dut_bin2gray.v"
def bin2gray(B, G, width):
os.system(cmd % width)
return Cosimulation("vvp -m ./myhdl.vpi bin2gray", B=B, G=G)
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From: <dan...@we...> - 2005-12-05 02:19:49
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George Pantazopoulos wrote:
> Hi all, in the example taken from the docs below, where is the myhdl.vpi
> file supposed to come from?
>
> Thanks,
> George
>
>
> import os
>
> from myhdl import Cosimulation
>
> cmd = "iverilog -o bin2gray -Dwidth=%s bin2gray.v dut_bin2gray.v"
> def bin2gray(B, G, width):
> os.system(cmd % width)
> return Cosimulation("vvp -m ./myhdl.vpi bin2gray", B=B, G=G)
>
I did not pay attention whether one of the development snapshots Jan put
on the page are complete. But if you download the 0.4 code and unpack
it, there is a cosimulation directory with an Icarus folder. In there is
a myhdl.c file which needs to be compiled and put in the folder,
specified in the README.txt file.
I saw you are using cygwin. I had trouble getting cosimulation going
under it, but that might be because of my strange setup with python. I
have the native windows python and that does not support the os.fork
command, which the myhdl cosimulation is relying on.
Now I tried the cygwin python version, which solved the os.fork problem,
but got some other error message. As I also use Linux I did not follow
up on that problem. I wonder whether it comes form the fact that I have
Icarus as windows package. I probably would need to compile it from
scratch under cygwin too to get it working.
Hope that helps.
Cheers,
Guenter
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From: Jan D. <ja...@ja...> - 2005-12-05 09:06:53
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Günter Dannoritzer wrote: > George Pantazopoulos wrote: > >>Hi all, in the example taken from the docs below, where is the myhdl.vpi >>file supposed to come from? >> >>Thanks, >>George >> > > > I did not pay attention whether one of the development snapshots Jan put > on the page are complete. The snapshots contain all you need (or at least all there is) in terms of code. The latest snapshots just don't have the pdf and html for the documentation. However, all co-simulation stuff is oriented towards Linux/Unix environments, and this is not clearly indicated in the various README files. Jan -- Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com Losbergenlaan 16, B-3010 Leuven, Belgium From Python to silicon: http://myhdl.jandecaluwe.com |
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From: George P. <ge...@ga...> - 2005-12-05 18:36:29
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Hi Guenter, > George Pantazopoulos wrote: >> Hi all, in the example taken from the docs below, where is the myhdl.v= pi >> file supposed to come from? >> if you download the 0.4 code and unpack > it, there is a cosimulation directory with an Icarus folder. Thanks, that did the trick! > I saw you are using cygwin. I had trouble getting cosimulation going > under it, but that might be because of my strange setup with python. I I probably would need to compile it from > scratch under cygwin too to get it working. > It seems to ok for me (I compiled icarus 0.82 under cygwin). However, uni= t tests that pass in the myHDL domain are failing when I run them with co-simulation. Have you had that happen to you before? Thanks, George > Hope that helps. > Cheers, > Guenter |
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From: nicran <ni...@gm...> - 2005-12-06 12:09:37
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co-sim can't be run on cygwin, as on windows platform, python core doesn't support the feature needed for co-sim. 2005/12/6, George Pantazopoulos <ge...@ga...>: > > > Hi Guenter, > > > George Pantazopoulos wrote: > >> Hi all, in the example taken from the docs below, where is the > myhdl.vpi > >> file supposed to come from? > >> > if you download the 0.4 code and unpack > > it, there is a cosimulation directory with an Icarus folder. > > Thanks, that did the trick! > > > I saw you are using cygwin. I had trouble getting cosimulation going > > under it, but that might be because of my strange setup with python. I > I probably would need to compile it from > > scratch under cygwin too to get it working. > > > > It seems to ok for me (I compiled icarus 0.82 under cygwin). However, uni= t > tests that pass in the myHDL domain are failing when I run them with > co-simulation. Have you had that happen to you before? > > Thanks, > George > > > > Hope that helps. > > Cheers, > > Guenter > > > > ------------------------------------------------------- > This SF.net email is sponsored by: Splunk Inc. Do you grep through log > files > for problems? Stop! Download the new AJAX search engine that makes > searching your log files as easy as surfing the web. DOWNLOAD SPLUNK! > http://ads.osdn.com/?ad_idv37&alloc_id=16865&opclick > _______________________________________________ > myhdl-list mailing list > myh...@li... > https://lists.sourceforge.net/lists/listinfo/myhdl-list > |
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From: <dan...@we...> - 2005-12-06 13:37:02
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nicran wrote: > co-sim can't be run on cygwin, as on windows platform, python core doesn't > support the feature needed for co-sim. > Has that to do with the missing os.fork under native windows or what other limitations does the python core have to not being able to run it under windows? Guenter |
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From: George P. <ge...@ga...> - 2005-12-06 23:25:37
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Hi, Right now I'm using cygwin-compiled python2.4 with cygwin-compiled icarus 0.82. Will things improve if I use a Windows native version of python? Thanks, George > co-sim can't be run on cygwin, as on windows platform, python core does= n't > support the feature needed for co-sim. > > 2005/12/6, George Pantazopoulos <ge...@ga...>: >> >> >> Hi Guenter, >> >> > George Pantazopoulos wrote: >> >> Hi all, in the example taken from the docs below, where is the >> myhdl.vpi >> >> file supposed to come from? >> >> >> if you download the 0.4 code and unpack >> > it, there is a cosimulation directory with an Icarus folder. >> >> Thanks, that did the trick! >> >> > I saw you are using cygwin. I had trouble getting cosimulation going >> > under it, but that might be because of my strange setup with python.= I >> I probably would need to compile it from >> > scratch under cygwin too to get it working. >> > >> >> It seems to ok for me (I compiled icarus 0.82 under cygwin). However, >> unit >> tests that pass in the myHDL domain are failing when I run them with >> co-simulation. Have you had that happen to you before? >> >> Thanks, >> George >> >> >> > Hope that helps. >> > Cheers, >> > Guenter >> >> >> >> ------------------------------------------------------- >> This SF.net email is sponsored by: Splunk Inc. Do you grep through log >> files >> for problems? Stop! Download the new AJAX search engine that makes >> searching your log files as easy as surfing the web. DOWNLOAD SPLUNK= ! >> http://ads.osdn.com/?ad_idv37&alloc_id=16865&opclick >> _______________________________________________ >> myhdl-list mailing list >> myh...@li... >> https://lists.sourceforge.net/lists/listinfo/myhdl-list >> > --=20 George Pantazopoulos http://www.gammaburst.net |
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From: <dan...@we...> - 2005-12-07 01:07:24
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George Pantazopoulos wrote: > Hi, > > Right now I'm using cygwin-compiled python2.4 with cygwin-compiled icarus > 0.82. Will things improve if I use a Windows native version of python? No, the native windows version of python has no os.fork functionality, which at this time is required by _cosimulation.py. Have a look at this old post: http://article.gmane.org/gmane.comp.python.myhdl/119/match=cosimulation+cygwin Guenter |
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From: <dan...@we...> - 2005-12-07 11:07:39
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George Pantazopoulos wrote: > Hi, > > Right now I'm using cygwin-compiled python2.4 with cygwin-compiled icarus > 0.82. Will things improve if I use a Windows native version of python? > I was able to run the cosimulation examples in the cosimulation/icarus/test folder of the myhdl source with icarus 0.8.1 compiled under cygwin with python 2.4. Guenter |
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From: <dan...@we...> - 2005-12-06 13:34:52
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George Pantazopoulos wrote: > > It seems to ok for me (I compiled icarus 0.82 under cygwin). However, unit > tests that pass in the myHDL domain are failing when I run them with > co-simulation. Have you had that happen to you before? Only if my myhdl logic would not generate the verilog that I expected it to be. Though I did not use co-simulation under cygwin. Did you try it with a simple example which allows you to follow it by hand to verify the output? Guenter |
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From: Jan D. <ja...@ja...> - 2005-12-07 07:38:25
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Günter Dannoritzer wrote: > George Pantazopoulos wrote: > > > >>It seems to ok for me (I compiled icarus 0.82 under cygwin). However, unit >>tests that pass in the myHDL domain are failing when I run them with >>co-simulation. Have you had that happen to you before? Like always, it would help to give details on how it fails on a small example. > > Only if my myhdl logic would not generate the verilog that I expected it > to be. A bug in the Verilog conversion is one possibility. Other possibilities that should be checked before: - initialization. What happens at time 0 may be different for Verilog and MyHDL, e.g. because of X-handling. Make sure all signals should have a defined value before you start comparing them. Don't compare at time 0, but after certain events (e.g. clock) or delay have occurred. - does co-simulation work at all ??? If it does work, the error messages you get should come from unittest assertion statements, not from the Cosimulation module. > > Though I did not use co-simulation under cygwin. > > Did you try it with a simple example which allows you to follow it by > hand to verify the output? Note that the toVerilog tests (myhdl/test/toVerilog) have plenty of unit test modules that use co-simulation. All those tests have been run with cver and icarus. (Exception: test_signed fails with Icarus because it has bugs with signed arithmetic.) So for a small example that should work, you may want to look there. Jan -- Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com Losbergenlaan 16, B-3010 Leuven, Belgium From Python to silicon: http://myhdl.jandecaluwe.com |
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From: George P. <ge...@ga...> - 2005-12-09 15:18:38
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Hi Jan,
> - does co-simulation work at all ??? If it does work, the error messages
> you get should come from unittest assertion statements, not from
> the Cosimulation module.
>
>
> Note that the toVerilog tests (myhdl/test/toVerilog) have plenty of
> unit test modules that use co-simulation. All those tests have been
> run with cver and icarus. (Exception: test_signed fails with Icarus
> because it has bugs with signed arithmetic.)
>
In myhdl0.5a1/myhdl/test/
test_Cosimulation.py and test_all.py both pass all their tests.
However, in myhdl0.5a1/myhdl/test/toVerilog/
running test_always_comb.py (or any of the other ones I've tried)
resulted in massive amounts of errors.
Below I pasted an excerpt from running test_always_comb.py:
My system configuration is:
Windows XP Professional SP2
cygwin (cygwin dll version 1.5.18)
myHDL 0.5a1
Icarus Verilog 0.8.2 (compiled on cygwin)
HTH,
George
Begin paste
-----------
test1 (__main__.AlwaysCombSimulationTest) ... ERROR
test2 (__main__.AlwaysCombSimulationTest) ... ERROR
test3 (__main__.AlwaysCombSimulationTest) ... ERROR
test4 (__main__.AlwaysCombSimulationTest) ... ERROR
test5 (__main__.AlwaysCombSimulationTest) ... ERROR
======================================================================
ERROR: test1 (__main__.AlwaysCombSimulationTest)
----------------------------------------------------------------------
Traceback (most recent call last):
File "test_always_comb.py", line 130, in test1
Simulation(self.bench(design1)).run(quiet=QUIET)
File "test_always_comb.py", line 103, in bench
design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v)
File "test_always_comb.py", line 80, in design_v
return setupCosimulation(**locals())
File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in
setupCosimulationCver
return Cosimulation(cmd, **kwargs)
File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line
84, in __init__
raise CosimulationError(_error.OSError, str(e))
CosimulationError: OSError: [Errno 2] No such file or directory
======================================================================
ERROR: test2 (__main__.AlwaysCombSimulationTest)
----------------------------------------------------------------------
Traceback (most recent call last):
File "test_always_comb.py", line 133, in test2
Simulation(self.bench(design2)).run(quiet=QUIET)
File "test_always_comb.py", line 103, in bench
design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v)
File "test_always_comb.py", line 80, in design_v
return setupCosimulation(**locals())
File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in
setupCosimulationCver
return Cosimulation(cmd, **kwargs)
File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line
84, in __init__
raise CosimulationError(_error.OSError, str(e))
CosimulationError: OSError: [Errno 2] No such file or directory
======================================================================
ERROR: test3 (__main__.AlwaysCombSimulationTest)
----------------------------------------------------------------------
Traceback (most recent call last):
File "test_always_comb.py", line 136, in test3
Simulation(self.bench(design3)).run(quiet=QUIET)
File "test_always_comb.py", line 103, in bench
design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v)
File "test_always_comb.py", line 80, in design_v
return setupCosimulation(**locals())
File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in
setupCosimulationCver
return Cosimulation(cmd, **kwargs)
File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line
84, in __init__
raise CosimulationError(_error.OSError, str(e))
CosimulationError: OSError: [Errno 2] No such file or directory
======================================================================
ERROR: test4 (__main__.AlwaysCombSimulationTest)
----------------------------------------------------------------------
Traceback (most recent call last):
File "test_always_comb.py", line 139, in test4
Simulation(self.bench(design4)).run(quiet=QUIET)
File "test_always_comb.py", line 103, in bench
design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v)
File "test_always_comb.py", line 80, in design_v
return setupCosimulation(**locals())
File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in
setupCosimulationCver
return Cosimulation(cmd, **kwargs)
File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line
84, in __init__
raise CosimulationError(_error.OSError, str(e))
CosimulationError: OSError: [Errno 2] No such file or directory
======================================================================
ERROR: test5 (__main__.AlwaysCombSimulationTest)
----------------------------------------------------------------------
Traceback (most recent call last):
File "test_always_comb.py", line 142, in test5
Simulation(self.bench(design5)).run(quiet=QUIET)
File "test_always_comb.py", line 103, in bench
design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v)
File "test_always_comb.py", line 80, in design_v
return setupCosimulation(**locals())
File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in
setupCosimulationCver
return Cosimulation(cmd, **kwargs)
File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line
84, in __init__
raise CosimulationError(_error.OSError, str(e))
CosimulationError: OSError: [Errno 2] No such file or directory
----------------------------------------------------------------------
Ran 5 tests in 1.079s
FAILED (errors=5)
ERROR
>
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From: Jan D. <ja...@ja...> - 2005-12-09 15:53:06
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George Pantazopoulos wrote: > Hi Jan, > >> - does co-simulation work at all ??? If it does work, the error messages >> you get should come from unittest assertion statements, not from >> the Cosimulation module. >> >> Note that the toVerilog tests (myhdl/test/toVerilog) have plenty of >> unit test modules that use co-simulation. All those tests have been >> run with cver and icarus. (Exception: test_signed fails with Icarus >> because it has bugs with signed arithmetic.) >> > In myhdl0.5a1/myhdl/test/ > test_Cosimulation.py and test_all.py both pass all their tests. This only tests the MyHDL side - there's no other HDL simulator involved. > However, in myhdl0.5a1/myhdl/test/toVerilog/ > running test_always_comb.py (or any of the other ones I've tried) > resulted in massive amounts of errors. Ok. In toVerilog/util.py I have added setup functions so that I can easily switch between Icarus and Cver. I prefer Cver these days, as it seems more reliable. So in the snapshot, the setup is apparently Cver by default. You'll have to go in the source code of util.py and make sure Icarus setup is used instead. I would be surprized if this alone would solve the issue. There may be other path/filenaming issues. You'll have to make sure that the icarus call from the setup functions is valid for your system. Good luck, Jan > > Below I pasted an excerpt from running test_always_comb.py: > > My system configuration is: > > Windows XP Professional SP2 > cygwin (cygwin dll version 1.5.18) > myHDL 0.5a1 > Icarus Verilog 0.8.2 (compiled on cygwin) > > HTH, > George > > Begin paste > ----------- > > test1 (__main__.AlwaysCombSimulationTest) ... ERROR > test2 (__main__.AlwaysCombSimulationTest) ... ERROR > test3 (__main__.AlwaysCombSimulationTest) ... ERROR > test4 (__main__.AlwaysCombSimulationTest) ... ERROR > test5 (__main__.AlwaysCombSimulationTest) ... ERROR > > ====================================================================== > ERROR: test1 (__main__.AlwaysCombSimulationTest) > ---------------------------------------------------------------------- > Traceback (most recent call last): > File "test_always_comb.py", line 130, in test1 > Simulation(self.bench(design1)).run(quiet=QUIET) > File "test_always_comb.py", line 103, in bench > design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v) > File "test_always_comb.py", line 80, in design_v > return setupCosimulation(**locals()) > File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in > setupCosimulationCver > return Cosimulation(cmd, **kwargs) > File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line > 84, in __init__ > raise CosimulationError(_error.OSError, str(e)) > CosimulationError: OSError: [Errno 2] No such file or directory > > ====================================================================== > ERROR: test2 (__main__.AlwaysCombSimulationTest) > ---------------------------------------------------------------------- > Traceback (most recent call last): > File "test_always_comb.py", line 133, in test2 > Simulation(self.bench(design2)).run(quiet=QUIET) > File "test_always_comb.py", line 103, in bench > design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v) > File "test_always_comb.py", line 80, in design_v > return setupCosimulation(**locals()) > File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in > setupCosimulationCver > return Cosimulation(cmd, **kwargs) > File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line > 84, in __init__ > raise CosimulationError(_error.OSError, str(e)) > CosimulationError: OSError: [Errno 2] No such file or directory > > ====================================================================== > ERROR: test3 (__main__.AlwaysCombSimulationTest) > ---------------------------------------------------------------------- > Traceback (most recent call last): > File "test_always_comb.py", line 136, in test3 > Simulation(self.bench(design3)).run(quiet=QUIET) > File "test_always_comb.py", line 103, in bench > design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v) > File "test_always_comb.py", line 80, in design_v > return setupCosimulation(**locals()) > File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in > setupCosimulationCver > return Cosimulation(cmd, **kwargs) > File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line > 84, in __init__ > raise CosimulationError(_error.OSError, str(e)) > CosimulationError: OSError: [Errno 2] No such file or directory > > ====================================================================== > ERROR: test4 (__main__.AlwaysCombSimulationTest) > ---------------------------------------------------------------------- > Traceback (most recent call last): > File "test_always_comb.py", line 139, in test4 > Simulation(self.bench(design4)).run(quiet=QUIET) > File "test_always_comb.py", line 103, in bench > design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v) > File "test_always_comb.py", line 80, in design_v > return setupCosimulation(**locals()) > File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in > setupCosimulationCver > return Cosimulation(cmd, **kwargs) > File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line > 84, in __init__ > raise CosimulationError(_error.OSError, str(e)) > CosimulationError: OSError: [Errno 2] No such file or directory > > ====================================================================== > ERROR: test5 (__main__.AlwaysCombSimulationTest) > ---------------------------------------------------------------------- > Traceback (most recent call last): > File "test_always_comb.py", line 142, in test5 > Simulation(self.bench(design5)).run(quiet=QUIET) > File "test_always_comb.py", line 103, in bench > design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v) > File "test_always_comb.py", line 80, in design_v > return setupCosimulation(**locals()) > File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in > setupCosimulationCver > return Cosimulation(cmd, **kwargs) > File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line > 84, in __init__ > raise CosimulationError(_error.OSError, str(e)) > CosimulationError: OSError: [Errno 2] No such file or directory > > ---------------------------------------------------------------------- > Ran 5 tests in 1.079s > > FAILED (errors=5) > ERROR > > >> > > > > ------------------------------------------------------- > This SF.net email is sponsored by: Splunk Inc. Do you grep through log > files > for problems? Stop! Download the new AJAX search engine that makes > searching your log files as easy as surfing the web. DOWNLOAD SPLUNK! > http://ads.osdn.com/?ad_id=7637&alloc_id=16865&op=click -- Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com Losbergenlaan 16, B-3010 Leuven, Belgium From Python to silicon: http://myhdl.jandecaluwe.com |
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From: George P. <ge...@ga...> - 2005-12-09 17:28:03
|
Hi Jan, in the util.py file pasted below, what should be assigned to
verilogCompile if I want to use Icarus and not cver?
By the way, by commenting out the last two lines of util.py,
test_always_comb.py and test_fsm.py both passed all tests. However, I
got an error regarding verilogCompile when I tried to run test_all.py.
So I need the correct value for it, commenting it out wont do.
All the test files I mentioned are in myhdl/test/toVerilog.
Thanks,
George
import os
path = os.path
from myhdl import *
# Icarus
def setupCosimulationIcarus(**kwargs):
name = kwargs['name']
objfile = "%s.o" % name
if path.exists(objfile):
os.remove(objfile)
analyze_cmd = "iverilog -o %s %s.v tb_%s.v" % (objfile, name, name)
os.system(analyze_cmd)
simulate_cmd = "vvp -m ../../../cosimulation/icarus/myhdl.vpi %s" %
objfile
return Cosimulation(simulate_cmd, **kwargs)
# cver
def setupCosimulationCver(**kwargs):
name = kwargs['name']
cmd = "cver -q
+loadvpi=../../../cosimulation/cver/myhdl_vpi:vpi_compat_bootstrap " + \
"%s.v tb_%s.v " % (name, name)
return Cosimulation(cmd, **kwargs)
def verilogCompileCver(name):
cmd = "cver -c %s.v" % name
os.system(cmd)
setupCosimulation = setupCosimulationIcarus
setupCosimulation = setupCosimulationCver
verilogCompile = verilogCompileCver
>
>
|
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From: Jan D. <ja...@ja...> - 2005-12-10 21:03:39
|
George Pantazopoulos wrote:
> Hi Jan, in the util.py file pasted below, what should be assigned to
> verilogCompile if I want to use Icarus and not cver?
>
> By the way, by commenting out the last two lines of util.py,
> test_always_comb.py and test_fsm.py both passed all tests. However, I
> got an error regarding verilogCompile when I tried to run test_all.py.
> So I need the correct value for it, commenting it out wont do.
>
> All the test files I mentioned are in myhdl/test/toVerilog.
George:
I reviewed the toVerilog tests with Icarus. I have 2
groups of failures:
- test_bugreports fails because of the missing verilogCompile
- test_inc has a failing test because of a bug in the test suite
I have solved these issues in my development code.
- test_dec has failing tests because of Icarus bugs with signed
- test_signed has failing tests because of Icarus bugs with signed
There's no solution for these ones. Please note that Icarus is
unreliable for signed arithmetic.
I will add notes in the README.txt file in the test/toVerilog
directory to explain the issues.
If you see the same, you can ignore the failures for now and it
basically means that you got it to work on Windows. That is
good news - thanks for the efforts.
For completeness: the verilogCompile only does a compile step
of Verilog code, no cosimulation. The Icarus version is:
def verilogCompileIcarus(name):
objfile = "%s.o" % name
if path.exists(objfile):
os.remove(objfile)
analyze_cmd = "iverilog -o %s %s.v tb_%s.v" % (objfile, name, name)
os.system(analyze_cmd)
Regards,
Jan
--
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
Losbergenlaan 16, B-3010 Leuven, Belgium
From Python to silicon:
http://myhdl.jandecaluwe.com
|
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