Thread: [myhdl-list] range object
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From: Haitao Z. <ha...@gm...> - 2005-03-02 23:26:35
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Another nice to have :) In VHDL one could define a range type and define a constant with it, so that one can associate a symbolic name say CTRL_FIELD with 7 DOWNTO 3, and then one can refer to register(CTRL_FIELD). In Verilog one can probably get by with macro defines. However in Python the native slicing is limited to integer arguments (?), so one has to define two named constants instead of passing an indexing object. This feature is handy when one needs to define control register fields. It allows one to define the named constants in one place. In Matlab one can index any vector with another vector. I don't see why this shouldn't be doable in Python as well. Maybe just no need for it, until the hardware designers come along? Is the simplest way to overload __getslice__ to accept a tuple (defining range)? I am not a Python expert so I will be happy to know if there is a way to do it now in Python. Haitao |
From: Jan D. <ja...@ja...> - 2005-03-03 09:56:39
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Haitao Zhang wrote: > Another nice to have :) > > In VHDL one could define a range type and define a constant with it, > so that one can associate a symbolic name say CTRL_FIELD with 7 > DOWNTO 3, and then one can refer to register(CTRL_FIELD). In Verilog > one can probably get by with macro defines. However in Python the > native slicing is limited to integer arguments (?), so one has to > define two named constants instead of passing an indexing object. This is not correct. Consider: >>> from myhdl import intbv >>> a = intbv(0xffff) >>> CTRL_FIELD = slice(4, 2) >>> type(CTRL_FIELD) <type 'slice'> >>> a[CTRL_FIELD] intbv(3L) >>> a[CTRL_FIELD] = 0 >>> hex(a) '0xFFF3L' The slice object is not often used explicitly in Python code but probably deserves more attention. (Warning: toVerilog doesn't support his - as always, patches are welcome!). > This feature is handy when one needs to define control register > fields. It allows one to define the named constants in one place. > > In Matlab one can index any vector with another vector. I don't see > why this shouldn't be doable in Python as well. Maybe just no need for > it, until the hardware designers come along? Is the simplest way to > overload __getslice__ to accept a tuple (defining range)? (__getslice__ is deprecated, use __getitem__ instead. Look in the 0.4.1 code for intbv to see how slicing is implemented.) More than you probably need has been done by lots of people doing lots of work. Check out the Numeric Python extension for a Python with MatLab-like functionality. Also check SciPy. (Warning: there is a LOT of material to study.) Regards, Jan -- Jan Decaluwe - Resources bvba - http://jandecaluwe.com Losbergenlaan 16, B-3010 Leuven, Belgium Using Python as a hardware description language: http://jandecaluwe.com/Tools/MyHDL/Overview.html |
From: Haitao Z. <ha...@gm...> - 2005-03-03 18:56:57
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On Thu, 03 Mar 2005 11:49:08 +0100, Jan Decaluwe <ja...@ja...> wrote: > Haitao Zhang wrote: > > Another nice to have :) > > > > In VHDL one could define a range type and define a constant with it, > > so that one can associate a symbolic name say CTRL_FIELD with 7 > > DOWNTO 3, and then one can refer to register(CTRL_FIELD). In Verilog > > one can probably get by with macro defines. However in Python the > > native slicing is limited to integer arguments (?), so one has to > > define two named constants instead of passing an indexing object. > > This is not correct. Consider: > > >>> from myhdl import intbv > >>> a = intbv(0xffff) > >>> CTRL_FIELD = slice(4, 2) > >>> type(CTRL_FIELD) > <type 'slice'> > >>> a[CTRL_FIELD] > intbv(3L) > >>> a[CTRL_FIELD] = 0 > >>> hex(a) > '0xFFF3L' > > The slice object is not often used explicitly in Python code but > probably deserves more attention. (Warning: toVerilog doesn't > support his - as always, patches are welcome!). > Thanks for the tip! This is exactly what I want for now. (Matlab behaviour is probably an over kill unless one has no-contigous field, which for hardware designer only happens under special circumstances). I will see what I can do about toVerilog when I get that far. Haitao > > This feature is handy when one needs to define control register > > fields. It allows one to define the named constants in one place. > > > > In Matlab one can index any vector with another vector. I don't see > > why this shouldn't be doable in Python as well. Maybe just no need for > > it, until the hardware designers come along? Is the simplest way to > > overload __getslice__ to accept a tuple (defining range)? > > (__getslice__ is deprecated, use __getitem__ instead. Look in > the 0.4.1 code for intbv to see how slicing is implemented.) > More than you probably need has been done by lots of people doing > lots of work. Check out the Numeric Python extension for a Python > with MatLab-like functionality. Also check SciPy. (Warning: > there is a LOT of material to study.) > > Regards, Jan > > -- > Jan Decaluwe - Resources bvba - http://jandecaluwe.com > Losbergenlaan 16, B-3010 Leuven, Belgium > Using Python as a hardware description language: > http://jandecaluwe.com/Tools/MyHDL/Overview.html > > ------------------------------------------------------- > SF email is sponsored by - The IT Product Guide > Read honest & candid reviews on hundreds of IT Products from real users. > Discover which products truly live up to the hype. Start reading now. > http://ads.osdn.com/?ad_id=6595&alloc_id=14396&op=click > _______________________________________________ > myhdl-list mailing list > myh...@li... > https://lists.sourceforge.net/lists/listinfo/myhdl-list > |
From: Beni C. <cb...@us...> - 2005-03-14 22:08:02
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Haitao Zhang wrote: > On Thu, 03 Mar 2005 11:49:08 +0100, Jan Decaluwe <ja...@ja...> wrote: > >>Haitao Zhang wrote: >> >>> [...] However in Python the native slicing is limited to integer >>> arguments (?), so one has to define two named constants instead of >>> passing an indexing object. >> Before Python 2.3, builtin sequences didn't support slice objects (which also means they didn't support slicing with a step - ``a[start:stop:step]``). In 2.3 and later it works. But behavior of builtin sequence types doesn't say anything about the behavior of `intbv`. >>This is not correct. Consider: >> >>>>>from myhdl import intbv >>>>>a = intbv(0xffff) >>>>>CTRL_FIELD = slice(4, 2) >>>>>type(CTRL_FIELD) >> >><type 'slice'> >> >>>>>a[CTRL_FIELD] >> >>intbv(3L) >> >>>>>a[CTRL_FIELD] = 0 >>>>>hex(a) >> >>'0xFFF3L' >> This works in MyHDL 0.4.1 (0.4 used ``__getslice__`` methods). Incidentally, 0.4.1 requires Python 2.3 for several reasons. >>The slice object is not often used explicitly in Python code but >>probably deserves more attention. (Warning: toVerilog doesn't >>support his - as always, patches are welcome!). >> Also note that before Python 2.3, `slice` was a constuctor function distinct from the <type 'slice'> object (accessible as `types.SliceType`) which. In Python 2.3 they were merged so now `slice` is the type and is callable (like `int` and other builtin types). > > Thanks for the tip! This is exactly what I want for now. (Matlab > behaviour is probably an over kill unless one has no-contigous field, > which for hardware designer only happens under special circumstances). > I will see what I can do about toVerilog when I get that far. > > Haitao > >>>In Matlab one can index any vector with another vector. I don't see >>>why this shouldn't be doable in Python as well. Maybe just no need for >>>it, until the hardware designers come along? Is the simplest way to >>>overload __getslice__ to accept a tuple (defining range)? >> You can have the matlab behavior with Numeric arrays. `intbv` could easily be extended to support it if there is a real use for it. BTW, `intbv` presently silently ignores the step of the slice. To prevent bugs going unnoticed, it should raise an exception if ``key.step is not None`` (or properly support it). |