Thread: [myhdl-list] rhea & cores
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From: Edward V. <dev...@sb...> - 2015-12-29 21:28:53
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Hi Chris,Thanks for all the help it is appreciated. Which of the cores in the rhea package are ready to add to a design? I am looking at using the CAT-Board or XulA2-LX9 & StickIt-MB with a RPiB. In rhea/rhea/cores/uart/ there 2 cores uart.py & uartlite.py.Do you add both?python test_uart.py --convert --test uart is this not functional yet? I did not see In rhea/rhea/models/uart/_uart_model.py this is not added to the design is that correct?This works python test_uart.py --trace --test uartls output/vcd _bench_uart.vcd This works okay gtkwave output/vcd/_bench_uart.vcd. Adding a method to pass data from the host to the fpga has been my greatest issue.I was hoping to use several GPIO to speed up the transfer of an image to the FPGA.Transferring an image over the USB takes a considerable amount of time. This is from the e-mail that I sent you on 12/3/15. Also in test_jpeg The option is python test_jpegenc.py --vtracegtkwave vcd/_tb_jpegenc.vcd GTKWave Analyzer v3.3.34 (w)1999-2012 BSI No symbols in VCD file..is it malformed? Exiting! Regards, Edward Vidal Jr. e-mail dev...@sb... 915-595-1613 |
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From: Christopher F. <chr...@gm...> - 2015-12-29 22:31:01
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On 12/29/15 3:28 PM, Edward Vidal wrote:
> Hi Chris,
> Thanks for all the help it is appreciated.
>
> Which of the cores in the rhea package are ready to add to a design?
Sorry to disappoint, this is all beta and
probably will be for awhile but with that
said many of the cores are usable. To
determine if they are can be some work
until documentation etc. is complete ...
>
> I am looking at using the CAT-Board or XulA2-LX9 & StickIt-MB with a RPiB.
>
> In rhea/rhea/cores/uart/ there 2 cores uart.py & uartlite.py.
> Do you add both?
> python test_uart.py --convert --test uart is this not functional yet? I
> did not see
No, one of the places to look is the __init__.py
in each of the core directories. It will give you
indicate which are the top-levels and then you
import
from rhea.cores.uart import uartlite
See the following example:
https://github.com/cfelton/rhea/blob/master/examples/boards/icestick/icestick_blinky_host.py
In general, it is best to look at the examples
versus the tests. The above example I have
tested on the IceStick. But note, the above
example did not work with Yosys+APaR when I
tried it but it does work with IceCube2.
Hope that helps,
Chris
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From: Edward V. <dev...@sb...> - 2015-12-29 23:06:51
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Chris ,The example you provided should also work with a XulA2-LX9 is that correct?I have downloaded IceCube2 but have not installed it? Which version of IceCube2 have you tested Linux or window?I normally work on a Ubuntu 12.04 this is where I have the Xilinx 14.6.Which board has the highest priority?
I also have been looking at the Parallella & zybo.Are these 2 boards easier to work with than the Zedboard. I have an Yocto O/S working but nothing in the FPGA side.Are you working on theses board using the Zynq 7000?
Regards,
Thanks
Edward Vidal Jr. e-mail dev...@sb... 915-595-1613
On Tuesday, December 29, 2015 3:31 PM, Christopher Felton <chr...@gm...> wrote:
On 12/29/15 3:28 PM, Edward Vidal wrote:
> Hi Chris,
> Thanks for all the help it is appreciated.
>
> Which of the cores in the rhea package are ready to add to a design?
Sorry to disappoint, this is all beta and
probably will be for awhile but with that
said many of the cores are usable. To
determine if they are can be some work
until documentation etc. is complete ...
>
> I am looking at using the CAT-Board or XulA2-LX9 & StickIt-MB with a RPiB.
>
> In rhea/rhea/cores/uart/ there 2 cores uart.py & uartlite.py.
> Do you add both?
> python test_uart.py --convert --test uart is this not functional yet? I
> did not see
No, one of the places to look is the __init__.py
in each of the core directories. It will give you
indicate which are the top-levels and then you
import
from rhea.cores.uart import uartlite
See the following example:
https://github.com/cfelton/rhea/blob/master/examples/boards/icestick/icestick_blinky_host.py
In general, it is best to look at the examples
versus the tests. The above example I have
tested on the IceStick. But note, the above
example did not work with Yosys+APaR when I
tried it but it does work with IceCube2.
Hope that helps,
Chris
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From: Christopher F. <chr...@gm...> - 2015-12-29 23:25:14
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On 12/29/15 5:05 PM, Edward Vidal wrote: > Chris , The example you provided should also work with a XulA2-LX9 > is that correct? Yes it should, you need the correct PMODs for the Xula2 and stickit. > I have downloaded IceCube2 but have not installed > it? Which version of IceCube2 have you tested Linux or window? IceCub2 2015.08.27744 on linux, Ubuntu 15.10. > I > normally work on a Ubuntu 12.04 this is where I have the Xilinx > 14.6. Which board has the highest priority? Not sure what you mean, highest priority? From my point of view a design should work with many different boards - no board really has a priority. > I also have been looking > at the Parallella & zybo. Are these 2 boards easier to work with than > the Zedboard. Don't know, haven't used a Zedboard, the Zybo is easier to use than the Parallella. > I have an Yocto O/S working but nothing in the FPGA > side. Are you working on theses board using the Zynq 7000? Yes, the Zynq 7010 and 7020 I only use the logic side I don't do anything with the PS. Regards, Chris |
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From: Edward V. <dev...@sb...> - 2015-12-29 23:36:08
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Chris,When you only use the logic what transfers data to the FPGA?
Have a Happy New Year.Regards, Edward Vidal Jr. e-mail dev...@sb... 915-595-1613
On Tuesday, December 29, 2015 4:25 PM, Christopher Felton <chr...@gm...> wrote:
On 12/29/15 5:05 PM, Edward Vidal wrote:
> Chris , The example you provided should also work with a XulA2-LX9
> is that correct?
Yes it should, you need the correct PMODs
for the Xula2 and stickit.
> I have downloaded IceCube2 but have not installed
> it? Which version of IceCube2 have you tested Linux or window?
IceCub2 2015.08.27744 on linux, Ubuntu 15.10.
> I
> normally work on a Ubuntu 12.04 this is where I have the Xilinx
> 14.6. Which board has the highest priority?
Not sure what you mean, highest priority? From
my point of view a design should work with many
different boards - no board really has a priority.
> I also have been looking
> at the Parallella & zybo. Are these 2 boards easier to work with than
> the Zedboard.
Don't know, haven't used a Zedboard, the Zybo is
easier to use than the Parallella.
> I have an Yocto O/S working but nothing in the FPGA
> side. Are you working on theses board using the Zynq 7000?
Yes, the Zynq 7010 and 7020 I only use the logic
side I don't do anything with the PS.
Regards,
Chris
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From: Christopher F. <chr...@gm...> - 2015-12-30 00:26:55
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On 12/29/15 5:35 PM, Edward Vidal wrote: > Chris, > When you only use the logic what transfers data to the FPGA? Depends on what interface I want to use. One can use the logic to drive the interface: UART, Ethernet, etc. Regards, Chris > > Have a Happy New Year. > Regards, > Edward Vidal Jr. e-mail dev...@sb... 915-595-1613 > > > On Tuesday, December 29, 2015 4:25 PM, Christopher Felton > <chr...@gm...> wrote: > > > On 12/29/15 5:05 PM, Edward Vidal wrote: > > Chris , The example you provided should also work with a XulA2-LX9 > > is that correct? > > Yes it should, you need the correct PMODs > for the Xula2 and stickit. > > > I have downloaded IceCube2 but have not installed > > it? Which version of IceCube2 have you tested Linux or window? > > IceCub2 2015.08.27744 on linux, Ubuntu 15.10. > > > I > > normally work on a Ubuntu 12.04 this is where I have the Xilinx > > 14.6. Which board has the highest priority? > > Not sure what you mean, highest priority? From > my point of view a design should work with many > different boards - no board really has a priority. > > > I also have been looking > > at the Parallella & zybo. Are these 2 boards easier to work with than > > the Zedboard. > > Don't know, haven't used a Zedboard, the Zybo is > easier to use than the Parallella. > > > I have an Yocto O/S working but nothing in the FPGA > > side. Are you working on theses board using the Zynq 7000? > > Yes, the Zynq 7010 and 7020 I only use the logic > side I don't do anything with the PS. > > > Regards, > Chris > > > ------------------------------------------------------------------------------ > _______________________________________________ > myhdl-list mailing list > myh...@li... <mailto:myh...@li...> > https://lists.sourceforge.net/lists/listinfo/myhdl-list > > |
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