myhdl-list

[myhdl-list] Cypress PSoC5

[Bob C. <fl...@gm...>]

I've been interested in MyHDL for some time, but found the general barrier to entry to programmable logic design to be a bit higher than I had the time to climb.

I just came across the Cypress PSoC5 (http://www.cypress.com/?id=2233), basically an ARM M3 wrapped in a small FPGA.  The PSoC5 has a development/configuration environment called PSoC Creator (http://www.cypress.com/?rID=56745) that manages and configures a large collection of typical uP peripheral cells. It also permits the user to add Verilog peripherals of their own design.

My thought (well, hope) is that the PSoC5 may be a near-ideal environment not only for embedded SW folks like myself to get a friendly taste of basic FPGA design, but also that it may be a terrific environment for MyHDL, where the translation to "flat" Verilog wouldn't be an issue.

I'm interested in the PSoC5 in any case, since I'm tired of selecting MCUs based on the specific number of specific kinds of on-board interfaces and peripherals my system designs need.  The allure of "Any function, on any pin, at any time" makes the elevated cost (~$20, about 5x-10x commodity MCUs) worth it, especially for rush designs where hardware needs to be fabricated before the low-level design is finished.

Before plunging in, what is the view of the MyHDL community of the PSoC5 as a target for MyHDL education and development?


Thanks,

-BobC

Re: [myhdl-list] Cypress PSoC5

[Norbo <Nor...@gm...>]

just tried to find out how much general purpose Flip-Flops a PSoC5 has, if  
this makes sense.
looks like 24 UDBs version has 192 Flip-Flops. (Quelle:  
http://www.cypress.com/?docID=39788 )
somewhat unrelated.

greetings Norbert


Am 09.10.2012, 03:05 Uhr, schrieb Bob Cunningham <fl...@gm...>:

> I've been interested in MyHDL for some time, but found the general  
> barrier to entry to programmable logic design to be a bit higher than I  
> had the time to climb.
>
> I just came across the Cypress PSoC5 (http://www.cypress.com/?id=2233),  
> basically an ARM M3 wrapped in a small FPGA.  The PSoC5 has a  
> development/configuration environment called PSoC Creator  
> (http://www.cypress.com/?rID=56745) that manages and configures a large  
> collection of typical uP peripheral cells. It also permits the user to  
> add Verilog peripherals of their own design.
>
> My thought (well, hope) is that the PSoC5 may be a near-ideal  
> environment not only for embedded SW folks like myself to get a friendly  
> taste of basic FPGA design, but also that it may be a terrific  
> environment for MyHDL, where the translation to "flat" Verilog wouldn't  
> be an issue.
>
> I'm interested in the PSoC5 in any case, since I'm tired of selecting  
> MCUs based on the specific number of specific kinds of on-board  
> interfaces and peripherals my system designs need.  The allure of "Any  
> function, on any pin, at any time" makes the elevated cost (~$20, about  
> 5x-10x commodity MCUs) worth it, especially for rush designs where  
> hardware needs to be fabricated before the low-level design is finished.
>
> Before plunging in, what is the view of the MyHDL community of the PSoC5  
> as a target for MyHDL education and development?
>
>
> Thanks,
>
> -BobC
>
>
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