Thread: [myhdl-list] compiling generated VHDL code
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From: Martín G. <ga...@gm...> - 2010-10-28 05:42:34
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Hi, I've been working on my project for the university (I called it "pymips"). Now I know (with a bit effort) how to code convertible things. But I don't know why the code I get fails when I try to compile it. For example, the converted version of the alu http://github.com/nqnwebs/pymips/blob/master/alu.py is this http://github.com/nqnwebs/pymips/blob/master/vhdl/alu.vhd when I try to compile or check that I get this: (hdl)tin@azulita:~/facu/arq/project/vhdl$ ghdl -a alu.vhd alu.vhd:31:22: no function declarations for operator "and" alu.vhd:33:22: no function declarations for operator "or" /usr/lib/ghdl/bin/ghdl: compilation error what's wrong? thanks Martín |
From: Christopher L. F. <chr...@gm...> - 2010-10-28 05:47:14
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> <html> <head> <meta content="text/html; charset=UTF-8" http-equiv="Content-Type"> <title></title> </head> <body text="#000000" bgcolor="#ffffff"> This might help, from the MyHDL manaul the default simulator for VHDL is GHDL. You can see in the default config you need to inlcude the pck_myhdl_*.vhd file as well.<br> <br> <a href="http://www.myhdl.org/doc/0.6/whatsnew/0.6.html?highlight=ghdl">http://www.myhdl.org/doc/0.6/whatsnew/0.6.html?highlight=ghdl</a><br> <span class="Apple-style-span" style="border-collapse: separate; color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;"><span class="Apple-style-span" style="font-family: 'Lucida Grande','Lucida Sans Unicode',Geneva,Verdana,sans-serif; font-size: 14px; line-height: 21px; text-align: left;"> <pre style="font-family: Consolas,'Deja Vu Sans Mono','Bitstream Vera Sans Mono',monospace; font-size: 0.95em; letter-spacing: 0.015em; padding: 0.5em; border: 1px solid rgb(204, 204, 204); background-color: rgb(248, 248, 248); line-height: 15px;"><span class="n">registerSimulator</span><span class="p">(</span> <span class="n">name</span><span class="o" style="color: rgb(102, 102, 102);">=</span><span class="s" style="color: rgb(64, 112, 160);">"<span class="highlight" style="background-color: rgb(251, 229, 78);">GHDL</span>"</span><span class="p">,</span> <span class="n">hdl</span><span class="o" style="color: rgb(102, 102, 102);">=</span><span class="s" style="color: rgb(64, 112, 160);">"VHDL"</span><span class="p">,</span> <span class="n">analyze</span><span class="o" style="color: rgb(102, 102, 102);">=</span><span class="s" style="color: rgb(64, 112, 160);">"<span class="highlight" style="background-color: rgb(251, 229, 78);">ghdl</span> -a --workdir=work pck_myhdl_</span><span class="si" style="color: rgb(112, 160, 208); font-style: italic;">%(version)s</span><span class="s" style="color: rgb(64, 112, 160);">.vhd </span><span class="si" style="color: rgb(112, 160, 208); font-style: italic;">%(topname)s</span><span class="s" style="color: rgb(64, 112, 160);">.vhd"</span><span class="p">,</span> <span class="n">elaborate</span><span class="o" style="color: rgb(102, 102, 102);">=</span><span class="s" style="color: rgb(64, 112, 160);">"<span class="highlight" style="background-color: rgb(251, 229, 78);">ghdl</span> -e --workdir=work -o </span><span class="si" style="color: rgb(112, 160, 208); font-style: italic;">%(unitname)s</span><span class="s" style="color: rgb(64, 112, 160);">_<span class="highlight" style="background-color: rgb(251, 229, 78);">ghdl</span> </span><span class="si" style="color: rgb(112, 160, 208); font-style: italic;">%(topname)s</span><span class="s" style="color: rgb(64, 112, 160);">"</span><span class="p">,</span> <span class="n">simulate</span><span class="o" style="color: rgb(102, 102, 102);">=</span><span class="s" style="color: rgb(64, 112, 160);">"<span class="highlight" style="background-color: rgb(251, 229, 78);">ghdl</span> -r </span><span class="si" style="color: rgb(112, 160, 208); font-style: italic;">%(unitname)s</span><span class="s" style="color: rgb(64, 112, 160);">_<span class="highlight" style="background-color: rgb(251, 229, 78);">ghdl</span>"</span> <span class="p">) </span></pre> </span></span><br> Hope that helps<br> .chris<br> <br> On 10/28/2010 12:42 AM, Martín Gaitán wrote: <blockquote cite="mid:AAN...@ma..." type="cite"> <pre wrap="">Hi, I've been working on my project for the university (I called it "pymips"). Now I know (with a bit effort) how to code convertible things. But I don't know why the code I get fails when I try to compile it. For example, the converted version of the alu <a class="moz-txt-link-freetext" href="http://github.com/nqnwebs/pymips/blob/master/alu.py">http://github.com/nqnwebs/pymips/blob/master/alu.py</a> is this <a class="moz-txt-link-freetext" href="http://github.com/nqnwebs/pymips/blob/master/vhdl/alu.vhd">http://github.com/nqnwebs/pymips/blob/master/vhdl/alu.vhd</a> when I try to compile or check that I get this: (hdl)tin@azulita:~/facu/arq/project/vhdl$ ghdl -a alu.vhd alu.vhd:31:22: no function declarations for operator "and" alu.vhd:33:22: no function declarations for operator "or" /usr/lib/ghdl/bin/ghdl: compilation error what's wrong? thanks Martín ------------------------------------------------------------------------------ Nokia and AT&T present the 2010 Calling All Innovators-North America contest Create new apps & games for the Nokia N8 for consumers in U.S. and Canada $10 million total in prizes - $4M cash, 500 devices, nearly $6M in marketing Develop with Nokia Qt SDK, Web Runtime, or Java and Publish to Ovi Store <a class="moz-txt-link-freetext" href="http://p.sf.net/sfu/nokia-dev2dev">http://p.sf.net/sfu/nokia-dev2dev</a> _______________________________________________ myhdl-list mailing list <a class="moz-txt-link-abbreviated" href="mailto:myh...@li...">myh...@li...</a> <a class="moz-txt-link-freetext" href="https://lists.sourceforge.net/lists/listinfo/myhdl-list">https://lists.sourceforge.net/lists/listinfo/myhdl-list</a> </pre> </blockquote> <br> </body> </html> |
From: Martín G. <ga...@gm...> - 2010-10-28 06:00:40
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On Thu, Oct 28, 2010 at 2:46 AM, Christopher L. Felton <chr...@gm...> wrote: > This might help, from the MyHDL manaul the default simulator for VHDL is > GHDL. You can see in the default config you need to inlcude the > pck_myhdl_*.vhd file as well. > > Thanks Chris, but that appears not work. (hdl)tin@azulita:~/facu/arq/project/vhdl$ ghdl -a pck_myhdl_06.vhd alu.vhd alu.vhd:31:22: no function declarations for operator "and" alu.vhd:33:22: no function declarations for operator "or" /usr/lib/ghdl/bin/ghdl: compilation error I also replaced toVHDL() to compile.analyze on the python code, and I get the same compilation error but a failed* testbench also. (*) all output are always 0, which is wrong (hdl)tin@azulita:~/facu/arq/project$ python alu.py /usr/lib/python2.6/sets.py:85: DeprecationWarning: functions overriding warnings.showwarning() must support the 'line' argument stacklevel=2) ** DeprecationWarning: the sets module is deprecated /home/tin/.virtualenvs/hdl/lib/python2.6/site-packages/myhdl-0.6-py2.6.egg/myhdl/conversion/_toVHDL.py:219: DeprecationWarning: functions overriding warnings.showwarning() must support the 'line' argument category=ToVHDLWarning ** ToVHDLWarning: Output port is read internally: out_ alu.vhd:31:22: no function declarations for operator "and" alu.vhd:33:22: no function declarations for operator "or" /usr/lib/ghdl/bin/ghdl: compilation error Analysis failed Control: 0000 | 251 AND 150 | 0 | z=0 Control: 0001 | 196 OR 100 | 0 | z=0 Control: 0010 | 187 add 56 | 0 | z=0 Control: 0110 | 167 substract 185 | 0 | z=0 Control: 0111 | 79 set on < 214 | 0 | z=0 Control: 1100 | 167 NOR 231 | 0 | z=0 <class 'myhdl.StopSimulation'>: No more events (hdl)tin@azulita:~/facu/arq/project$ any other idea? |
From: Jan D. <ja...@ja...> - 2010-10-28 20:08:38
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Probably the reason is that there is no and/or in numeric_std that returns a signed for unsigned arguments. I checked this with 0.7dev, and it seems this bug is solved with an additional cast (I don't remember though fixing this though :-)) I suggest to use 0.7dev by pulling it from mercurial - this should be more or less the 0.7 release for within a few weeks or so anyway, and so you help with getting the bugs out :-) Jan Martín Gaitán wrote: > Hi, > > I've been working on my project for the university (I called it > "pymips"). Now I know (with a bit effort) how to code convertible > things. But I don't know why the code I get fails when I try to > compile it. > > For example, the converted version of the alu > http://github.com/nqnwebs/pymips/blob/master/alu.py > > is this > > http://github.com/nqnwebs/pymips/blob/master/vhdl/alu.vhd > > when I try to compile or check that I get this: > > (hdl)tin@azulita:~/facu/arq/project/vhdl$ ghdl -a alu.vhd > alu.vhd:31:22: no function declarations for operator "and" > alu.vhd:33:22: no function declarations for operator "or" > /usr/lib/ghdl/bin/ghdl: compilation error > > what's wrong? > > thanks > Martín > > ------------------------------------------------------------------------------ > Nokia and AT&T present the 2010 Calling All Innovators-North America contest > Create new apps & games for the Nokia N8 for consumers in U.S. and Canada > $10 million total in prizes - $4M cash, 500 devices, nearly $6M in marketing > Develop with Nokia Qt SDK, Web Runtime, or Java and Publish to Ovi Store > http://p.sf.net/sfu/nokia-dev2dev > _______________________________________________ > myhdl-list mailing list > myh...@li... > https://lists.sourceforge.net/lists/listinfo/myhdl-list -- Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com Python as a HDL: http://www.myhdl.org VHDL development, the modern way: http://www.sigasi.com Analog design automation: http://www.mephisto-da.com World-class digital design: http://www.easics.com |