myhdl-list

[myhdl-list] Does anyone have a reasonable design with Myhdl

[etv q. <etv...@gm...>]

Hi

Can anybody point me to a reasonable modelling of a design with MyHDL and
also the verilog equivalent of it? I have some commercial simulator and
wanted to see how this one scales with that.

Regards
Asif

Re: [myhdl-list] Does anyone have a reasonable design with Myhdl

[Thomas T. <tho...@de...>]

Hi Asif,

> Can anybody point me to a reasonable modelling of a design with MyHDL and
> also the verilog equivalent of it? I have some commercial simulator and
> wanted to see how this one scales with that.

On the myhdl website are some nice examples,
i.e. I recently uploaded the myhdl code for sine wave generator using a 
sigma delta dac.

http://myhdl.jandecaluwe.com/doku.php/projects:sinewave_generator

It is based on a modified version of the cordic calculations in the 
cookbook example and of a modified SD-DAC design originally made by 
George Pantazopoulos (BTW: his website and email don't work anymore).

I did just myhdl python simulation with it - no cosimultion neither with 
   cver nor with quartus 
(http://myhdl.jandecaluwe.com/doku.php/projects:cosimulation_with_quartus).
But I successfully ran it on a Cyclone II.

Thomas