myhdl-list

[myhdl-list] MyHDL and synthesize to non HDL

[<joa...@em...>]

I've used MyHDL to model the 1-wire protocol from dallas
between a master and a slave, and it was really easy to
do so although I was a bit skeptical concerning the
restrictions of standard generators.

I was even able to write it as an OO model based on classes.

As the protocol is rather stable now I'd like to use the
model for synthesizing it, but not into hardware but:

I'd like to use AVR microcontrollers for doing some home automation
with the 1-wire protocol for the communication between them
(because it's simple and electrically uncritical over "long"
distances). I'd like to map it onto different resources inside
the AVRs depending on their capabilities (UART, port, USI) and
have written models for these resources.

The AVRs can be programmed in C rather easily.

Now to my question:

Is MyHDL suited to synthesize C from the python code?

My idea would be as follows: A class instance could model a particular
AVR microcontroller and I could assign ports or an UART to be
used for 1-wire communication (and other purposes). I would then
like to simulate the combination of instances connected to form
a 1-wire network and then synthesize one of the instances to C in
order to generate the program for the flash of the AVR.

Is this somehow possible (I'm willing to dig deep into MyHDL). If
not, what else can I do with the model? If I still have to hand-code
the AVR in C, how can I at least have some advantage of MyHDL in
relation to the C-program?


Joachim

Re: [myhdl-list] MyHDL and synthesize to non HDL

[dannoritzer <dan...@we...>]

Joachim König-Baltes wrote:
> I've used MyHDL to model the 1-wire protocol from dallas
> between a master and a slave, and it was really easy to
> do so although I was a bit skeptical concerning the
> restrictions of standard generators.
> 
> I was even able to write it as an OO model based on classes.
> 
[...]
> 
> Now to my question:
> 
> Is MyHDL suited to synthesize C from the python code?
> 

Have you looked into the toVerilog function? I know you don't want to go
that way, just a thought here. If you code complies to the restrictions
for toVerilog, I wonder how difficult it would be create a toC function,
based on the existing toVerilog code.

Guenter

Re: [myhdl-list] MyHDL and synthesize to non HDL

[<joa...@em...>]

dannoritzer schrieb:
> Have you looked into the toVerilog function?
no, not yet, will have a look at it.
>  I know you don't want to gothat way, just a thought here.
I do not mind going that way, seems natural to me.
>  If you code complies to the restrictions
> for toVerilog, I wonder how difficult it would be create a toC function,
> based on the existing toVerilog code.
>   
I read a similar question from George Pantazopoulos (on 2006/09/26) 
about synthesizability of classes
and Jan did not give much hope for that. In my case, the classes are 
somehow essential
for me. The individual activities would be handled by ISRs triggered by 
interrupt on the
port pin or by a timer. But I'll have a look at toVerilog and see if I 
have a chance.

Joachim

Re: [myhdl-list] MyHDL and synthesize to non HDL

[Jan D. <ja...@ja...>]

Joachim König-Baltes wrote:
> I've used MyHDL to model the 1-wire protocol from dallas
> between a master and a slave, and it was really easy to
> do so although I was a bit skeptical concerning the
> restrictions of standard generators.
> 
> I was even able to write it as an OO model based on classes.
> 
> As the protocol is rather stable now I'd like to use the
> model for synthesizing it, but not into hardware but:
> 
> I'd like to use AVR microcontrollers for doing some home automation
> with the 1-wire protocol for the communication between them
> (because it's simple and electrically uncritical over "long"
> distances). I'd like to map it onto different resources inside
> the AVRs depending on their capabilities (UART, port, USI) and
> have written models for these resources.
> 
> The AVRs can be programmed in C rather easily.
> 
> Now to my question:
> 
> Is MyHDL suited to synthesize C from the python code?
> 
> My idea would be as follows: A class instance could model a particular
> AVR microcontroller and I could assign ports or an UART to be
> used for 1-wire communication (and other purposes). I would then
> like to simulate the combination of instances connected to form
> a 1-wire network and then synthesize one of the instances to C in
> order to generate the program for the flash of the AVR.

I've looked at some AVR examples very briefly.

As I understand it, you can use C to program the AVR
architecture by referring to symbols representing registers
and hardware primitives. So it's a "low-level" kind of C code
in the sense that you couldn't use it for anything else than
to program AVR controllers. We are therefore not really
talking about MyHDL to C, but MyHDL to AVR.

> Is this somehow possible (I'm willing to dig deep into MyHDL). If
> not, what else can I do with the model? If I still have to hand-code
> the AVR in C, how can I at least have some advantage of MyHDL in
> relation to the C-program?

Integrating generic C code based on a functional interface
in Python code would be trivial. But again, this doesn't seem
our case here. The hardware interface is embedded in the AVR C
code in the way the register symbols are set up and used.

In short, while I don't exclude that meaningful things could be
done, I don't immediately see what and how (and in a reasonable
development time).

Jan

-- 
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
Losbergenlaan 16, B-3010 Leuven, Belgium
     From Python to silicon:
     http://myhdl.jandecaluwe.com

Re: [myhdl-list] MyHDL and synthesize to non HDL

[<joa...@em...>]

Jan Decaluwe wrote:
> I've looked at some AVR examples very briefly.
>
> As I understand it, you can use C to program the AVR
> architecture by referring to symbols representing registers
> and hardware primitives. So it's a "low-level" kind of C code
> in the sense that you couldn't use it for anything else than
> to program AVR controllers. We are therefore not really
> talking about MyHDL to C, but MyHDL to AVR.
>   
Yes.
> Integrating generic C code based on a functional interface
> in Python code would be trivial. But again, this doesn't seem
> our case here. The hardware interface is embedded in the AVR C
> code in the way the register symbols are set up and used.
>   
Yes, exactly.
> In short, while I don't exclude that meaningful things could be
> done, I don't immediately see what and how (and in a reasonable
> development time)
O.k., thanks for clearing things up. So MyHDL is very valuable for me 
for describing
the connection from the wire into the AVR via UART, Port or USI (simple 
shiftregister
base serial communication hardware) and simulating a 1-wire network 
based on that.

For the final coding however I'll have to derive C manually. It's o.k. 
this way, I just did not
want to spend time on things that would be to difficult to achieve. But 
MyHDL is still useful
here too because of the easy simulation of modification to the algorithms.

Joachim