myhdl-list

[myhdl-list] Feedback request on decorators in MyHDL

[Jan D. <ja...@ja...>]

Hi all:

The past 2 weeks have been intensive and fun, as I have
worked on an exciting new feature for 0.5: decorators.

I am about to introduce this in MyHDL, and it has the
potential of being quite significant (but backwards-compatible,
don't worry) - for the better.

I want to avoid making mistakes in all the excitement, so
here is your chance to provide feedback. I have written a
MyHDL Enhancement Proposal (MEP) that documents the feature:

     http://myhdl.jandecaluwe.com/doku.php/meps:mep-100

For those interested, a first implementation is available
in snapshot 0.5dev2, available on the web site.

I will now turn my attention to other MyHDL issues until
the beginning of November, so you busy people have some time
before I make the final decision to go ahead.
All kind of feedback is welcome, but especially if there
is something that you don't like.

Regards,

Jan

-- 
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
Losbergenlaan 16, B-3010 Leuven, Belgium
     Electronic design with Python:
     http://myhdl.jandecaluwe.com

Re: [myhdl-list] Feedback request on decorators in MyHDL

[bedros <be...@ya...>]

great work Jan, I've not touched Myhdl in over a year,
and I'm very impressed with how you use decorators in
MyHDL. it makes Myhdl very similar to a real RTL.

ease of use is very important to attract developers,
and it seems you're going in the right direction.

what's holding me back from using it is the fact that
I  can't integrate it with VHDL code. What's the
status of VHPI interface?


Any updates on simulators for myhdl?

Regards,

-Bedros
--- Jan Decaluwe <ja...@ja...> wrote:

> Hi all:
> 
> The past 2 weeks have been intensive and fun, as I
> have
> worked on an exciting new feature for 0.5:
> decorators.
> 
> I am about to introduce this in MyHDL, and it has
> the
> potential of being quite significant (but
> backwards-compatible,
> don't worry) - for the better.
> 
> I want to avoid making mistakes in all the
> excitement, so
> here is your chance to provide feedback. I have
> written a
> MyHDL Enhancement Proposal (MEP) that documents the
> feature:
> 
>     
> http://myhdl.jandecaluwe.com/doku.php/meps:mep-100
> 
> For those interested, a first implementation is
> available
> in snapshot 0.5dev2, available on the web site.
> 
> I will now turn my attention to other MyHDL issues
> until
> the beginning of November, so you busy people have
> some time
> before I make the final decision to go ahead.
> All kind of feedback is welcome, but especially if
> there
> is something that you don't like.
> 
> Regards,
> 
> Jan
> 
> -- 
> Jan Decaluwe - Resources bvba -
> http://www.jandecaluwe.com
> Losbergenlaan 16, B-3010 Leuven, Belgium
>      Electronic design with Python:
>      http://myhdl.jandecaluwe.com
> 
> 
> 
>
-------------------------------------------------------
> This SF.Net email is sponsored by:
> Power Architecture Resource Center: Free content,
> downloads, discussions,
> and more.
> http://solutions.newsforge.com/ibmarch.tmpl
> _______________________________________________
> myhdl-list mailing list
> myh...@li...
>
https://lists.sourceforge.net/lists/listinfo/myhdl-list
> 

[myhdl-list] Re: Feedback request on decorators in MyHDL

[Jan D. <ja...@ja...>]

bedros wrote:
> great work Jan, I've not touched Myhdl in over a year,
> and I'm very impressed with how you use decorators in
> MyHDL. it makes Myhdl very similar to a real RTL.
> 
> ease of use is very important to attract developers,
> and it seems you're going in the right direction.
> 
> what's holding me back from using it is the fact that
> I  can't integrate it with VHDL code. What's the
> status of VHPI interface?

Not even thought about it :-)

Is VHPI actually used? By which simulator?

At some point I considered to do a modelsim interface
in their proprietary interface, because I thought that
was the most popular C-interface. But for various reasons
(such as changing MyHDL priorities), I haven't started this.
Also, I fear there might be legal issues if I develop
something in a proprietary API without even owning
a modelsim license.

In Verilog, I have at least 2 options to develop a vpi
interface with an open source simulator. I still don't know about
an open-source VHDL solution with a vpi-like support.
Without that, it's going to be hard. Moreover, one could
argue that this means that the need is just not there.

> Any updates on simulators for myhdl?

I used cver and Icarus, and I know people are using
Modelsim Verilog also.

Regards, Jan


-- 
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
Losbergenlaan 16, B-3010 Leuven, Belgium
     Electronic design with Python:
     http://myhdl.jandecaluwe.com

Re: [myhdl-list] Re: Feedback request on decorators in MyHDL

[Tom D. <td...@di...>]

Jan,

We use Aldec Riviera with MyHDL. It works great.

Also, Riviera supports VHPI.

You can get an evaluation version of Riviera if that helps to get the 
VHDL support done.

One thought on VHDL support, we (and I'm sure there are others) would 
like to help write the toVHDL module. My problem is I don't know where 
to start or what really needs to be done. What could be used from 
toVerilog and so on.

Maybe we could figure out how to break the design up into some pieces 
that a few of us could tackle to get toVHDL done?

Unfortunately (my opinion) VHDL is very popular in FPGA designs and I 
would say 75% of our clients either prefer or require we deliver VHDL.

Tom




Jan Decaluwe wrote:

> bedros wrote:
>
>> great work Jan, I've not touched Myhdl in over a year,
>> and I'm very impressed with how you use decorators in
>> MyHDL. it makes Myhdl very similar to a real RTL.
>>
>> ease of use is very important to attract developers,
>> and it seems you're going in the right direction.
>>
>> what's holding me back from using it is the fact that
>> I  can't integrate it with VHDL code. What's the
>> status of VHPI interface?
>
>
> Not even thought about it :-)
>
> Is VHPI actually used? By which simulator?
>
> At some point I considered to do a modelsim interface
> in their proprietary interface, because I thought that
> was the most popular C-interface. But for various reasons
> (such as changing MyHDL priorities), I haven't started this.
> Also, I fear there might be legal issues if I develop
> something in a proprietary API without even owning
> a modelsim license.
>
> In Verilog, I have at least 2 options to develop a vpi
> interface with an open source simulator. I still don't know about
> an open-source VHDL solution with a vpi-like support.
> Without that, it's going to be hard. Moreover, one could
> argue that this means that the need is just not there.
>
>> Any updates on simulators for myhdl?
>
>
> I used cver and Icarus, and I know people are using
> Modelsim Verilog also.
>
> Regards, Jan
>
>

Re: [myhdl-list] Re: Feedback request on decorators in MyHDL

[<dan...@we...>]

Tom Dillon wrote:
...
> 
> One thought on VHDL support, we (and I'm sure there are others) would
> like to help write the toVHDL module. My problem is I don't know where
> to start or what really needs to be done. What could be used from
> toVerilog and so on.

Maybe it would be a good idea to add a page on the wiki about toVHDL and
create a specification. Then Jan could guide, without having to do all
the work.

> 
> Maybe we could figure out how to break the design up into some pieces
> that a few of us could tackle to get toVHDL done?
> 

Actually in June of this year there was a post from David Brochart
(subject: "Re: Opencores project") about his Opencores project. It seems
like that he started already with some toVHDL. Maybe he would like to
join into that too?

Cheers

Guenter

[myhdl-list] Re: Feedback request on decorators in MyHDL

[Jan D. <ja...@ja...>]

Günter Dannoritzer wrote:

> Maybe it would be a good idea to add a page on the wiki about toVHDL and
> create a specification. Then Jan could guide, without having to do all
> the work.

Good idea. However, there are several open issues and I think it's
best to discuss/resolve them on the newsgroup first. I'm almost done
with a 0.5 feature (1-2 days) and after that, I'll organize my thoughts
to get this started in parallel.

Jan

-- 
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
Losbergenlaan 16, B-3010 Leuven, Belgium
     Electronic design with Python:
     http://myhdl.jandecaluwe.com

[myhdl-list] Re: Feedback request on decorators in MyHDL

[Jan D. <ja...@ja...>]

Tom Dillon wrote:
> Jan,
> 
> We use Aldec Riviera with MyHDL. It works great.
> 
> Also, Riviera supports VHPI.
> 
> You can get an evaluation version of Riviera if that helps to get the 
> VHDL support done.
> 
> One thought on VHDL support, we (and I'm sure there are others) would 
> like to help write the toVHDL module. My problem is I don't know where 
> to start or what really needs to be done. What could be used from 
> toVerilog and so on.
> 
> Maybe we could figure out how to break the design up into some pieces 
> that a few of us could tackle to get toVHDL done?
> 
> Unfortunately (my opinion) VHDL is very popular in FPGA designs and I 
> would say 75% of our clients either prefer or require we deliver VHDL.

Really? I'm starting to like this FPGA market more and more! What about
the international correlation (you know, the cliche Europe=VHDL,
US=Verilog)?

For the record, I like VHDL - in the past I have co-builded a company
based on it. Fundamentally, MyHDL is mainly inspired by VHDL - not
Verilog. I'm just disappointed with the way VHDL has been (mal)treated
by major EDA vendors. So I'm happy to hear that it's not dead.

Of course, we all know that VHDL is rather inflexible. So, there seems
to be large opportunity for MyHDL here: VHDL users will recognize the
concepts, but get an unrivaled flexibility.

On toVHDL: it seems about time that I dump my current thoughts on
this, but I'll do that in another thread.

Jan

-- 
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
Losbergenlaan 16, B-3010 Leuven, Belgium
     Electronic design with Python:
     http://myhdl.jandecaluwe.com

Re: [myhdl-list] Re: Feedback request on decorators in MyHDL

[bedros <be...@ya...>]

Tom,

are you successfully using MyHDL with aldecs VHPI? I'm
using Aldec ActiveHDL and would like to use MyHDL with
their VHPI interface. 

-Bedros

--- Jan Decaluwe <ja...@ja...> wrote:

> Tom Dillon wrote:
> > Jan,
> > 
> > We use Aldec Riviera with MyHDL. It works great.
> > 
> > Also, Riviera supports VHPI.
> > 
> > You can get an evaluation version of Riviera if
> that helps to get the 
> > VHDL support done.
> > 
> > One thought on VHDL support, we (and I'm sure
> there are others) would 
> > like to help write the toVHDL module. My problem
> is I don't know where 
> > to start or what really needs to be done. What
> could be used from 
> > toVerilog and so on.
> > 
> > Maybe we could figure out how to break the design
> up into some pieces 
> > that a few of us could tackle to get toVHDL done?
> > 
> > Unfortunately (my opinion) VHDL is very popular in
> FPGA designs and I 
> > would say 75% of our clients either prefer or
> require we deliver VHDL.
> 
> Really? I'm starting to like this FPGA market more
> and more! What about
> the international correlation (you know, the cliche
> Europe=VHDL,
> US=Verilog)?
> 
> For the record, I like VHDL - in the past I have
> co-builded a company
> based on it. Fundamentally, MyHDL is mainly inspired
> by VHDL - not
> Verilog. I'm just disappointed with the way VHDL has
> been (mal)treated
> by major EDA vendors. So I'm happy to hear that it's
> not dead.
> 
> Of course, we all know that VHDL is rather
> inflexible. So, there seems
> to be large opportunity for MyHDL here: VHDL users
> will recognize the
> concepts, but get an unrivaled flexibility.
> 
> On toVHDL: it seems about time that I dump my
> current thoughts on
> this, but I'll do that in another thread.
> 
> Jan
> 
> -- 
> Jan Decaluwe - Resources bvba -
> http://www.jandecaluwe.com
> Losbergenlaan 16, B-3010 Leuven, Belgium
>      Electronic design with Python:
>      http://myhdl.jandecaluwe.com
> 
> 
> 
>
-------------------------------------------------------
> SF.Net email is sponsored by:
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> it for free - -and be entered to win a 42" plasma tv
> or your very own
> Sony(tm)PSP.  Click here to play:
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> _______________________________________________
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>
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> 

Re: [myhdl-list] Re: Feedback request on decorators in MyHDL

[Tom D. <td...@di...>]

Bedros,

Have not tried with ActiveHDL VHPI, only Riviera and VPI.

Tom


bedros wrote:

>Tom,
>
>are you successfully using MyHDL with aldecs VHPI? I'm
>using Aldec ActiveHDL and would like to use MyHDL with
>their VHPI interface.
>
>-Bedros
>
>--- Jan Decaluwe <ja...@ja...> wrote:
>
>  
>
>>Tom Dillon wrote:
>>    
>>
>>>Jan,
>>>
>>>We use Aldec Riviera with MyHDL. It works great.
>>>
>>>Also, Riviera supports VHPI.
>>>
>>>You can get an evaluation version of Riviera if
>>>      
>>>
>>that helps to get the 
>>    
>>
>>>VHDL support done.
>>>
>>>One thought on VHDL support, we (and I'm sure
>>>      
>>>
>>there are others) would 
>>    
>>
>>>like to help write the toVHDL module. My problem
>>>      
>>>
>>is I don't know where 
>>    
>>
>>>to start or what really needs to be done. What
>>>      
>>>
>>could be used from 
>>    
>>
>>>toVerilog and so on.
>>>
>>>Maybe we could figure out how to break the design
>>>      
>>>
>>up into some pieces 
>>    
>>
>>>that a few of us could tackle to get toVHDL done?
>>>
>>>Unfortunately (my opinion) VHDL is very popular in
>>>      
>>>
>>FPGA designs and I 
>>    
>>
>>>would say 75% of our clients either prefer or
>>>      
>>>
>>require we deliver VHDL.
>>
>>Really? I'm starting to like this FPGA market more
>>and more! What about
>>the international correlation (you know, the cliche
>>Europe=VHDL,
>>US=Verilog)?
>>
>>For the record, I like VHDL - in the past I have
>>co-builded a company
>>based on it. Fundamentally, MyHDL is mainly inspired
>>by VHDL - not
>>Verilog. I'm just disappointed with the way VHDL has
>>been (mal)treated
>>by major EDA vendors. So I'm happy to hear that it's
>>not dead.
>>
>>Of course, we all know that VHDL is rather
>>inflexible. So, there seems
>>to be large opportunity for MyHDL here: VHDL users
>>will recognize the
>>concepts, but get an unrivaled flexibility.
>>
>>On toVHDL: it seems about time that I dump my
>>current thoughts on
>>this, but I'll do that in another thread.
>>
>>Jan
>>
>>-- 
>>Jan Decaluwe - Resources bvba -
>>http://www.jandecaluwe.com
>>Losbergenlaan 16, B-3010 Leuven, Belgium
>>     Electronic design with Python:
>>     http://myhdl.jandecaluwe.com
>>
>>
>>
>>
>>    
>>
>-------------------------------------------------------
>  
>
>>SF.Net email is sponsored by:
>>Tame your development challenges with Apache's
>>Geronimo App Server. Download
>>it for free - -and be entered to win a 42" plasma tv
>>or your very own
>>Sony(tm)PSP.  Click here to play:
>>http://sourceforge.net/geronimo.php
>>_______________________________________________
>>myhdl-list mailing list
>>myh...@li...
>>
>>    
>>
>https://lists.sourceforge.net/lists/listinfo/myhdl-list
>  
>
>
>
>
>-------------------------------------------------------
>SF.Net email is sponsored by:
>Tame your development challenges with Apache's Geronimo App Server. Download
>it for free - -and be entered to win a 42" plasma tv or your very own
>Sony(tm)PSP.  Click here to play: http://sourceforge.net/geronimo.php
>_______________________________________________
>myhdl-list mailing list
>myh...@li...
>https://lists.sourceforge.net/lists/listinfo/myhdl-list
>
>  
>

Re: [myhdl-list] Re: Feedback request on decorators in MyHDL

[<dan...@we...>]

Jan Decaluwe wrote:
> 
> Is VHPI actually used? By which simulator?
> 

I have just been looking into the features of GHDL under:

	http://ghdl.free.fr/features.html

At the bottom of the page it talks about some VPI/VHPI features. I am
not that experienced to judge whether that is sufficient or not?

Maybe that is a starting point?

To add to my suggestion about a toVHDL page on the wiki, maybe a first
step would be to specify what functions of a VHPI interface are needed
in order to search for a suitable simulator or evaluated what is missing
with existing open source simulators?

Are there actually any other VHDL simulators, other than GHDL?

Cheers,

Guenter

Re: [myhdl-list] Re: Feedback request on decorators in MyHDL

[<dan...@we...>]

Jan Decaluwe wrote:
...
> 
> Is VHPI actually used? By which simulator?
> 
...

I am adding a quote from the GHDL mailing list, as someone just asked a
question about the VPI/VHPI interface of GHDL there. Maybe this helps
getting a better idea about its status.

Cheers,

Guenter



GHDL mailing list post from today:

Subject: Re: VPI or VHPI

> Felix Bertram wrote:
>> GHDL's VPI support is very incomplete. It was implemented to  interface
>> GHDL with the IVI (Icarus Verilog Interactive) GUI  frontend- which
>> worked quite fine two years ago.
>> 
>> IVI implemented the following functionality:
>> - load a design
>> - select signals from the signal hierarchy
>> - view signal traces
>> - start simulation
>> - break simulation
>> - restart simulation
>> 
>> It did not implement single-stepping or source-breakpoints. Having a 
>> look at the IVI project should result in a few ideas on how to create  a
>> debugger frontend using VPI.
>> 
>> I am not sure, if the VPI stuff still works, as it is a long time  since
>> I last used it. GHDL has improved quite a bit, and maybe things  got
>> broken somewhere during this process. Improving GHDL's VPI  capabilities
>> would definitely be a major step. I believe there is  several people
>> around here willing to contribute to this, sure it  would be good to get
>> everybody together and coordinate the efforts a  bit. Christian?
>> Jean-Noel? Richard?
>> 
>> 
>> Best regards, Felix
>> 

Re: [myhdl-list] Feedback request on decorators in MyHDL

[Haitao Z. <ha...@gm...>]

Jan,

I remeber reading an interesting thread on decorators in
comp.lang.python. Some consider the decorator feature a hack on the
polymorphic function, because it can not replace true polymorphism
which is hard. So there is question whether this feature should stay
with future Pythons. A main issue is that there were no truely good
examples of usage pattern (polymorphic dispatch usage does not
simplify the user interface since python function already supports
arbitrary argument types) and often the dispatch through decorator is
more confusing than explicit control statements. However I think your
usage pattern in myhdl holds as a true example of how it can be used
to the advantage on the user side. I don't think decorator will go
away and this myhdl usage pattern strongly supports keeping
decorators. It will be nice to make it more well known to the Python
community.

Very nice and pythonic discovery indeed.

Haitao

On 10/21/05, Jan Decaluwe <ja...@ja...> wrote:
> Hi all:
>
> The past 2 weeks have been intensive and fun, as I have
> worked on an exciting new feature for 0.5: decorators.
>
> I am about to introduce this in MyHDL, and it has the
> potential of being quite significant (but backwards-compatible,
> don't worry) - for the better.
>
> I want to avoid making mistakes in all the excitement, so
> here is your chance to provide feedback. I have written a
> MyHDL Enhancement Proposal (MEP) that documents the feature:
>
>      http://myhdl.jandecaluwe.com/doku.php/meps:mep-100
>
> For those interested, a first implementation is available
> in snapshot 0.5dev2, available on the web site.
>
> I will now turn my attention to other MyHDL issues until
> the beginning of November, so you busy people have some time
> before I make the final decision to go ahead.
> All kind of feedback is welcome, but especially if there
> is something that you don't like.
>
> Regards,
>
> Jan
>
> --
> Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
> Losbergenlaan 16, B-3010 Leuven, Belgium
>      Electronic design with Python:
>      http://myhdl.jandecaluwe.com
>
>
>
> -------------------------------------------------------
> This SF.Net email is sponsored by:
> Power Architecture Resource Center: Free content, downloads, discussions,
> and more. http://solutions.newsforge.com/ibmarch.tmpl
> _______________________________________________
> myhdl-list mailing list
> myh...@li...
> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>

[myhdl-list] Re: Feedback request on decorators in MyHDL

[David B. <dav...@fr...>]

I'd like to be involved into that project, although I don't think tha=
t=20
that I've done could be reused. I started writting a toVHDL but then =
I
didn't have time to work on it any more and I stopped in the middle o=
f
it. I'd rather start with something new, so I'll be watching the
progress of that project on the wiki.

Regards,

David.



G=FCnter Dannoritzer wrote:

>Tom Dillon wrote:
>...
> =20
>
>>One thought on VHDL support, we (and I'm sure there are others) wou=
ld
>>like to help write the toVHDL module. My problem is I don't know wh=
ere
>>to start or what really needs to be done. What could be used from
>>toVerilog and so on.
>>   =20
>>
>
>Maybe it would be a good idea to add a page on the wiki about toVHDL=
 and
>create a specification. Then Jan could guide, without having to do a=
ll
>the work.
>
> =20
>
>>Maybe we could figure out how to break the design up into some piec=
es
>>that a few of us could tackle to get toVHDL done?
>>
>>   =20
>>
>
>Actually in June of this year there was a post from David Brochart
>(subject: "Re: Opencores project") about his Opencores project. It s=
eems
>like that he started already with some toVHDL. Maybe he would like t=
o
>join into that too?
>
>Cheers
>
>Guenter
>
>
>-------------------------------------------------------
>SF.Net email is sponsored by:
>Tame your development challenges with Apache's Geronimo App Server. =
Download
>it for free - -and be entered to win a 42" plasma tv or your very ow=
n
>Sony(tm)PSP.  Click here to play: http://sourceforge.net/geronimo.ph=
p
>_______________________________________________
>myhdl-list mailing list
>myh...@li...
>https://lists.sourceforge.net/lists/listinfo/myhdl-list
>
>
>
> =20
>