Re: [myhdl-list] GSoC'16 | JPEG Encoder

[Henry G. <he...@ma...>]

On 02/03/16 21:37, Martin Strubel wrote:
> Hi,
>> > 
>> > What do you mean my VLIW microcode? Why does it need to be VL?
>> > 
> It's like the parallel instructions for some DSPs like the Intel Micro
> Signal Architecture (Blackfin). To avoid extra decoding stages, the
> opcodes just turned out simplest as "VLIW". Snippet:
> 
> #     LD  SELB  VADD   PERM  MODE          ST
> 	( 0,   1,   1,     3,    MODE_ASAA,     0, ),  #0:
> 	( 3,   0,   1,     3,    MODE_ASAA,     2, ),  #1:
> ...
> 
> For example, portions of a long opcode control the different stage
> switches of the pipeline (whether you do just a mul, a mac or de-mac).

Ah that makes sense - it's essentially a concatenation of the control
signals.

Henry