Re: [myhdl-list] how is it with gtkwave and tracing interfaces?
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From: Christopher F. <chr...@gm...> - 2016-01-31 21:40:13
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On 1/31/16 6:59 AM, David Belohrad wrote: > ok, try this one. Do you see rc.ClkxC and rc.ResetxRN under i_dut in > gtkwave? I don't In your `i_dut` instance the generators access the `ClkxC` and `ResetxRN` ports, they don't access the interface, these are the local variables the tracer decides to traces these (as seen in the hierarchy). (from VCD file): $var reg 1 # ClkxC $end $var reg 1 $ ResetxRN $end I imagine if you pass `rc` and use `rc.*` in the `i_dut` instance you will see the interface hierarchy? I modified it to reference clock and reset in the testbench function. def wrapper(self): rc = self.rc clock = self.rc.ClkxC reset = self.rc.ResetxRN def testbench(): @instance def doreset(): yield reset.pulse( (10, 12, 18) ) @instance def stimulus(): yield func(self) raise StopSimulation i_clk = clock.gen() i_dut = self.dut(*self.args) return i_dut, i_clk, stimulus, doreset I use interfaces quite extensively and typically don't run into tracing issues - not sure what might be different here ... > > # really disgusting way how to link relative import sys > sys.path.append('/home/belohrad/git/didt/MyHDL/rhea') You can get around this by using in the rhea directory. >> python setup.py develop > > from myhdl import * > import unittest from functools > import wraps > from rhea.system.clock import * > from rhea.system.reset import * The intended use is from rhea.system import Clock, Reset In Python3 the above won't work. Regards, Chris |