Re: [myhdl-list] Interfaces in hierarchcal way

[Jos H. <jos...@gm...>]

David Holl <david <at> ad5ey.net> writes:

> Using MyHDL, I did create a full DMA controller for transferring radio
> data from our digital receivers to user applications.  The controller
> accepts data from our DDC's via AXI4-Stream signaling, ....

> ...  They were written around the time of MyHDL 0.7
> and 0.8-dev (before MyHDL's hierarchical signal ), so I did end-up
> implementing a number of work-arounds to avoid some MyHDL peculiarities
> at the time.

Hi David,

You're clearly much further than I am... I'm just starting to learn 
writing a linux device driver. So anything which can be shared would be 
helpful! For instance I could try a port to Altera-SoC.
The hierarchical AXI interface was just my initial step to get going.
So, I'm going into the same direction as you by first trying to create a 
fifo in hardware, which can be written and read from the CPU side.

Best regards,
Jos