[myhdl-list] Initial value support

[Henry G. <he...@ca...>]

What is current status of the initial value support? My understanding is 
that the code is there but comes caveat emptor.

Certainly, in the Xilinx FPGA world, initial values seem to be the 
preferred strategy:
http://www.xilinx.com/support/documentation/white_papers/wp272.pdf

(though I appreciate that ASICs are not like that).

Cheers,

Henry