Re: [myhdl-list] List Of Constants

[Christopher F. <chr...@gm...>]

On 3/18/15 11:36 AM, Josy Boelen wrote:
>
>>> To me the prettiness of the VHDL or Verilog code is an indication of
> how
>>> 'good' the MyHDL code was drafted/converted.
>>
>> I strongly disagree, you are trading off readability
>> and pythonics in the MyHDL code for "prettier"
>> intermediate code.
>>
>> A similar example to yours is a straightfoward
>> sum-of products
>>
>>       x = [Signal(intbv(...) ...]
>>       b = tuple(map(int, [round(1/N*xmax) for ...]))
>>
>>        <at> always_seq(clock.posedge, reset=reset)
>>    	ssum = 0
>> 	for ii in range(N):
>>               c = b[ii]
>> 	    ssum = ssum + x[ii] * c
>>           y.next = ssum
>>
>> I wouldn't write the above any other way even though
>> the converted code will have the case embedded in the
>> process.
>>
>> <snip>
>
> You're quite right that for N being large the above approach is the only
> way. Imagine spelling out 64 constants all day long ...
> For the moment.
> When your (ours?) MEP_lite gets implemented, it will look like this
>        x = [Signal(intbv(...) ...]
>        b = tuple(map(int, [round(1/N*xmax) for ...]))
>
>        def sop(N, x, b ):
>        <at> always_seq(clock.posedge, reset=reset)
>        def sop():
>            ssum = 0
>            for ii in range(N):
>   	      ssum = ssum + x[ii] * b[ii]
>            y.next = ssum
>        return sop
>

No, even with the enhancement request the above would
not be converted because the index is not constant.
For that to be convertible the loop would need to be
unrolled.

Regards,
Chris