Re: [myhdl-list] Tool to cosimulate VHDL in Vivado

[Henry G. <he...@ca...>]

On 11/03/15 17:27, Henry Gomersall wrote:
> I've written a tool to do behavioural cosimulation of synchronous VHDL
> code using the Vivado simulator.

This is now published at:

https://github.com/hgomersall/Veriutils

It took a while longer than expected to get Interfaces working (and even 
then, only to one level) - there is a bug in the conversion whereby 
signals are missed if they're only used in a vhdl_code block.

Enum signals are not currently supported.

Please liberally submit pull requests! (with tests :)

It's not currently packaged as I need to go and eat my dinner. Hopefully 
I'll get around to it soon.

Cheers,

Henry