Re: [myhdl-list] delays in VHDL conversion

[Henry G. <he...@ca...>]

On 09/02/15 08:38, Josy Boelen wrote:
<snip>
> I'm not aware if
> there is a cast to convert something (int or real) into a time-type. Of
> course we could write the function(s) to do this and add these to the
> MyHDL package and modify the MyHDL code:
>   elif f is delay:
>              self.write( "to_VHDLtime( ")
>              self.visit(node.args[0])  # this will end up in visit_Num()
> and produce an integer or a real (I suppose)
>              self.write(" )")
>              return

That's quite a neat method. It has the advantage of being explicit and 
clear in the resultant VHDL.

Are the constants new in 0.9? Presumably there should be a test for this...

Henry