Re: [myhdl-list] reusable blocks with different interfaces

[Josy B. <jos...@gm...>]

Christopher Felton <chris.felton <at> gmail.com> writes:


>  <at> Josy, the VHDL code you posted on github is
> the hand generated version, correct?  Where in
> the code is the example/situation being discussed?
> 
> Read a quote from Conway the other day: "to be
> a great Mathematician one should be thinking
> about six (at least) things at a time" (summarized).
> 
> Not so sure about that, because I should benefit
> more from my lack of attention to any one thing :)
> 
> Regard,
> Chris
><snip>

The posted code is indeed the hand-crafted one. I re-started on the 
MyHDL translation, but I got stuck on one VHDL construct I cannot 
emulate in MyHDL, so I had to rethink the strategy.
I've added the 'unpolished' MyHDL version to Github.
One note already: I made a few conversion functions, and MyHDL 
duplicates one of them 8 times for every cell, making for a very large 
VHDL IR (18000 lines for a 16 by 9 cell array).
Second note: this is an excellent example to show Henry Gomersall's 
concern for expanding the *enum* functionality. The *pygol* code will 
not convert because: to convert the following
    def to_gol_states( l ):
        if l:
            return  gol_states.ALIVE
        else:
           return gol_states.DEAD

MyHDl has to write:
    function to_gol_states( l : stdLogic ) return **gol_states** is
        ...
but breaks away with:
    AttributeError: 'vhd_enum' object has no attribute 'toStr'

Compare the VHDL and the MyHDL source, and tell me what you think?

Best regards,

Josy