Re: [myhdl-list] Setting of enum values

[Henry G. <he...@ca...>]

On 16/01/15 03:07, Christopher Felton wrote:
> On 1/10/2015 5:44 AM, Jan Decaluwe wrote:
>> >On 01/10/2015 11:41 AM, Henry Gomersall wrote:
>> >
>>> >>
>>> >>There is an argument to be made (which I'm trying to make:)  ) that
>>> >>enums should be handled and enforced at the MyHDL level, and converted
>>> >>to whatever types make sense at the HDL level. Requiring that MyHDL
>>> >>enums map to VHDL enums rather limits their scope.
>> >
>> >That is not the requirement.
>> >
>> >The enum was modeled after the VHDL enums because
>> >I consider that a better model than alternatives in
>> >other languages that I know of.
>> >
>> >The fact that they map naturally to VHDL enums is simply
>> >a consequence of that modeling decision.
>> >
> I understand Jan's point with keeping the enum but
> I would like to explore the options to solve the
> original issue - third party interfacing.
>
> I imagine, you would be stuck with an explicit
> variable definition, e.g.
>
>       # third-party state definitions
>       S_S1,S_S2,S_S3 = range(3)
>
> Considering, third-party interfaces (might) be limited
> this is a reasonable approach(?).

I think this can be done with a explicit support of something akin to 
the IntEnum class. This makes a clean separation between the existing 
enum and areas where the enum/Int boundary is blurry.

Henry