Re: [myhdl-list] Some name mangling on the constants needed for VHDL

[Christopher F. <chr...@gm...>]

On 1/9/2015 10:27 AM, Henry Gomersall wrote:
> I was pleased to find that now constants are allowed in 0.9.
>
> The problem is if the constant name is simply dumped passed in as the
> constant name in VHDL. So the following happens:
>
> class Bleh(object):
>       meh = 12
>
> eep = Bleh()
>
<snip>
>
> constant eep.meh: integer := 12;
>
> I understand some name mangling is probably required here to make the
> name acceptable to the standard.
>

This isn't officially supported and the above
is a manifestation of the "Interface" support.

Note, this doesn't mean it is not a good idea
to support this but for now it is not.  A work
around is to dereference constants and variables
(i.e. non Signals) locally.

     meh = eep.meh
     @always_seq(clock.posedge ...)
     def inclogic():
     # ...
             foo.next = meh

I posted another example that had a similar
side effect.
http://article.gmane.org/gmane.comp.python.myhdl/3716/match=interesting

In my opinion, the correct action will be to
add some code in 0.9 to detect this and not
convert the code and then create a new MEP
for constants and variables.  I tried to contact
"jck" on IRC and describe the problem but I
haven't heard back.  "jck" implemented the
Interfaces MEP.

Regards,
Chris