[myhdl-list] Some name mangling on the constants needed for VHDL

[Henry G. <he...@ca...>]

I was pleased to find that now constants are allowed in 0.9.

The problem is if the constant name is simply dumped passed in as the 
constant name in VHDL. So the following happens:

class Bleh(object):
     meh = 12

eep = Bleh()

def Inc(count, enable, foo, clock, reset):

     """ Incrementer with enable.

     count -- output
     enable -- control input, increment when 1
     clock -- clock input
     reset -- asynchronous reset input
     """

     @always_seq(clock.posedge, reset=reset)
     def incLogic():
         if enable:
             if foo == MyEnum.a:
                 foo.next = eep.meh

     return incLogic

yields

constant eep.meh: integer := 12;

I understand some name mangling is probably required here to make the 
name acceptable to the standard.

I expect it is a pretty simple tweak to this code:
https://bitbucket.org/jandecaluwe/myhdl/src/823dbd6643997bc92a2a92a34486eb0e42de1ace/myhdl/conversion/_toVHDL.py?at=default#cl-330

The question is, how should the name mangling be performed? This strikes 
me as a similar problem to defining the names in interfaces.

It's not clear to me that the potential problem of name collision is 
actually solved in the interfaces, though I'm happy with something 
similar. Is there a name mangling class for future improvements in this?

Cheers,

Henry