[myhdl-list] Using existing HDL modules

[Mike G. <mj...@gi...>]

Hi

How do you access chip primitives and hard IP blocks in MyHDL? The chip
vendor supplies modules and instantiation templates in Verilog or VHDL. Is
there any way of including or importing these without having to edit the
Verilog or VHDL file generated by MyHDL? I can't work out whether the
user-defined code facility can do this.

My knowledge of Verilog and VHDL is very limited.

Many thanks

Mike