[myhdl-list] Problem converting list of intbv
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From: Pedro P. <ped...@gm...> - 2014-07-07 23:16:58
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Hello, I am new to this list. I am getting the following exception while trying to convert a simple mux to Verilog. myhdl.ConversionError: in file list-of-intbv.py, line 12: Not supported: list I know I could use tuple of int (since I am using constants), but I want to use lists to implement array of registers and the docs says it is possible. Here is the design: from myhdl import Signal, always_comb, intbv, toVerilog def uint(width, val = 0): return intbv(val, 0, 2 ** width) def u32(val = 0): return uint(32, val) def mux(s, o): @always_comb def logic(): i = [ u32(0xaaaaaaaa), u32(0xbbbbbbbb), u32(0xcccccccc), u32(0xdddddddd) ] o.next = i[s] return logic s = Signal(intbv(0)[2:]) o = Signal(intbv(0)[32:]) toVerilog(mux, s, o) Any help is appreciated. Thanks. ızznɹpǝԀ oɹpǝԀ |