Re: [myhdl-list] cosimulated verilog as an instance?
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From: Per K. <bas...@gm...> - 2014-05-24 22:38:36
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Usually simulation models for commercial IP:s come as encrypted RTL, and so far as I'm aware you cannot simulate encrypted RTL in any currently available tool based on open source. You'll simply have to fork up the cash for a commercial, closed source, simulation tool. But if you do, there is nothing preventing you from instanciating the IP in a MyHDL module using user defined code and then driving it with a MyHDL testbench using co-simulation. The greater question is of course whether an open source tool could in theory simulate encrypted RTL, but I leave that for people better versed in cryptography than myself. It is also not a question with which MyHDL needs to bother itself, because it has nothing to do with the language. It concerns only the simulator. Cheers! Per ps. If it is specifically a question of Xilinx IP, then you could implement co-simulation for isim (which Xilinx provides for free). I don't know how much work that would be, it depends on whether isim supports VPI. On Sat, May 24, 2014 at 3:59 PM, Christopher Felton <chr...@gm...>wrote: > On 5/24/14 5:32 AM, Henry Gomersall wrote: > > Consider the use case in which one wishes to use a piece of > > off-the-shelf IP, which comes with a suitable simulation library (let's > > say some Xilinx IP with a unisim library). > > > > I have a notion that I want to be able to generate an instance of the > > simulated model for incorporation into a MyHDL design, so when run, it > > executes in the cosimulation environment. This would remove the > > requirement to reimplement the logic of an IP block in MyHDL. > > > > In conjunction with user defined code, this would allow a neat way to > > incorporate commercial blocks into the design. > > > > Is all this sensible? Is there a better way to do it? > > > I don't think this would be a small addition/change and I am > not certain if it is possible, it would take some experimentation > etc. > > The solution that I am aware of is to use a module to emulate > the IP but this can take some work to get the timing of the > interfaces and the behavior correct. When creating the module > to emulate the IP you can use the /v*_code/ or /v*_instance/ > to generate the V* to instantiate the IP. > > Regards, > Chris > > > > > ------------------------------------------------------------------------------ > "Accelerate Dev Cycles with Automated Cross-Browser Testing - For FREE > Instantly run your Selenium tests across 300+ browser/OS combos. > Get unparalleled scalability from the best Selenium testing platform > available > Simple to use. Nothing to install. Get started now for free." > http://p.sf.net/sfu/SauceLabs > _______________________________________________ > myhdl-list mailing list > myh...@li... > https://lists.sourceforge.net/lists/listinfo/myhdl-list > |