[myhdl-list] emulate always_seq decorator
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From: Marcel H. <1he...@in...> - 2013-12-27 08:01:19
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Hi everyone, one of my devices is using yield a lot (state machine), but the decorators don't support generator functions. So I looked up in the source and wrote my own 'always_seq' decorator. > @instance > def genFunction(): > #we emulate a @always_seq(clk.posedge) > senslist = [clk.posedge] > > if reset.async: > if reset.active: > senslist.append(reset.posedge) > else: > senslist.append(reset.negedge) > > while True: > yield senslist > > if reset == reset.active: > presetSignals() > state.next = tState.FETCH > else: > yield logic() the problem is, that toVHDL is now complaining about a lof ot things > myhdl.ConversionError: in file /home/marcel/studium/WISE1314/Projekt/hardware/cpu.py, line 254: > Not supported: list this is the senslist = [clk.posedge] line. And also > myhdl.ConversionError: in file /home/marcel/studium/WISE1314/Projekt/hardware/cpu.py, line 266: > Unsupported attribute: active (if reset == reset.active). How do I tell myhdl that he should translate this as usual?! Or tell me a different method to use yield inside a always_seq decorated function. Greetings, Marcel |