Re: [myhdl-list] MEP 107 Initial support
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From: Keerthan jai.c <jck...@gm...> - 2013-10-02 19:46:24
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toVerilog returns whatever would be returned if you called the function directly, usually a tuple of generators. So, someone could hypothetically have been passing the return value of toVerilog to a myhdl.Simulation object. Returning the portmap alongside the previous return value would break their code. toVerilog.portmap seems reasonable. On Wed, Oct 2, 2013 at 3:33 PM, Christopher Felton <chr...@gm...>wrote: > <snip> > > > > This seems like a reasonable approach, with a port > > definition list. But should it be an attribute or a > > return of the toV* functions? > > Nevermind, it looks like toV* already has a return > that I forgot/never new. I am not sure what/how the > return is used, it appears to return the top-level that > is passed. Maybe the return can be: > > return h.top,portmap > > I don't know if this breaks any existing code. > > Regards, > Chris > > > > > ------------------------------------------------------------------------------ > October Webinars: Code for Performance > Free Intel webinars can help you accelerate application performance. > Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most > from > the latest Intel processors and coprocessors. See abstracts and register > > http://pubads.g.doubleclick.net/gampad/clk?id=60134791&iu=/4140/ostg.clktrk > _______________________________________________ > myhdl-list mailing list > myh...@li... > https://lists.sourceforge.net/lists/listinfo/myhdl-list > -- have a nice day -jck |