Re: [myhdl-list] MEP 107 Initial support
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From: Keerthan jai.c <jck...@gm...> - 2013-10-02 18:16:48
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Name conversion is pretty straight forward (obj.attr -> obj_attr, unless obj_attr already exists as a port). Users who don't like this can simply not use the feature. I don't think this feature should be disabled. I don't think its unreasonable to expect users of advanced features to be aware of some of the implementation details. Making the intf dict available to users as an attribute in the conversion object will greatly simplify cosimulations, without resorting to hacks to prevent unnecessary repetition. Consider writing a test bench for the Mux example in the manual: def test_mux(cosim=False): a, b, z = [Signal(intbv(0)[8:]) for i in range(3)] sel = Signal(intbv(0)[1:]) if cosim: toVerilog(mux, z, a, b, sel) os.system('iverilog -o mux.o mux.v tb_mux.v') dut = Cosimulation('vvp -m ./myhdl.vpi mux.o', z=z, a=a, b=b, sel=sel) #proposed method #dut = Cosimulation('vvp -m ./myhdl.vpi mux.o', **toVerilog.intf) else: dut = mux(z, a, b, sel) @instance def stim(): for i in range(8): a.next, b.next, sel.next = [randrange(i) for i in (8, 8, 2)] yield delay(10) if sel == 1: expected = a else: expected = b assert z == expected Simulation(dut, stim).run() On Wed, Oct 2, 2013 at 12:35 PM, Christopher Felton <chr...@gm...>wrote: > On 10/1/2013 6:12 PM, Keerthan jai.c wrote: > > Conversion of interfaces in the top level makes the arguments for > > cosimulation tricky. > > I think one option to simplify this is to store intf as an attribute in > the > > toVerilog and toVHDL objects. > > You can then pass **toVerilog.intf as the second argument to > Cosimulation. > > > > > > I never thought top-level interface conversion was reasonable. > From my perspective it makes things difficult because, now as > a user you have to know the conversion details (e.g. how the > names are expanded). > > My opinion, is that top-level interfaces conversion should > not be supported. I guess, it would be nice to flag and throw > a nice error message? > > Regards, > Chris > > > > ------------------------------------------------------------------------------ > October Webinars: Code for Performance > Free Intel webinars can help you accelerate application performance. > Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most > from > the latest Intel processors and coprocessors. See abstracts and register > > http://pubads.g.doubleclick.net/gampad/clk?id=60134791&iu=/4140/ostg.clktrk > _______________________________________________ > myhdl-list mailing list > myh...@li... > https://lists.sourceforge.net/lists/listinfo/myhdl-list > -- have a nice day -jck |