Re: [myhdl-list] [PATCH 0 of 2 RFC] Add support for negative indexes

[Angel E. <ang...@gm...>]

On Mon, Sep 9, 2013 at 10:11 AM, Jan Decaluwe <ja...@ja...> wrote:
> On 10/13/2012 02:12 AM, Angel Ezquerra wrote:
>> Python lists have a natural way to access list itemps from the end of
>> the list, which is to use negative indexes. These patches add this
>> functionality to MyHDL.
>>
>> The first patch adds negative index and slice limit support to the
>> intbv class. I think this first patch is probably right and not very
>> controversial
>
> intbv's are dual in nature - bit sequence but also integer interpretation.
>
> indexing is at the intersection of the two. An index corresponds
> to a bit position, but also to the power of the bit when
> expanding the integer in a sum of powers of 2. To match
> the natural way of writing numbers, intbv slicing is already
> totally different from any standard python sequence: the direction
> is reversed.
>
> Personally, I haven't seen much need to enhance intbv bit indexing
> to match what you can do with sequences like lists. However, there
> is a very good reason to stress the power of two interpretation:
> when we add a fixbv type, it would be natural to use the same
> interpretation. Negative indices would represent fractional bits.
> It also seems natural that the intbv would like a subtype of
> a general fixbv type.
>
> Therefore, I propose to keep intbv indexing like it is.

Jan,

sorry it took me a while to get the time to respond.

I understand your point that it would be useful to use negative
indexes to indicate fractional bits on a fixbv. However in my
experience I am as likely to need to access bits from the LSB than
from the MSB. I often see VHDL code that needs to do an explicit
mathematical operation to access the 2nd leftmost bit in a
std_logic_vector, for example. I find it silly that you have to care
about such a thing, when the synthesizer can do that calculation for
you. To me this is a very clear example of a way in which a python
based HDL can extend the capabilities of regular HDL syntax, making
what is unnecessarily hard on VHDL or Verilog easy and concise.

Thus I still believe that it would be very useful to be able to refer
to bits from the MSB. The fixbv class will be useful, no doubt, but
there is a lot of code that will keep using regular intbv. I don't
think the capabilities of the intbv class should be limited because
they could interfere with a derived class which is not even finished
yet.

That being said perhaps there is a way to keep negative index bit
access while retaining the capability of accessing fractional fixbv
bits. The trick is to think of the negative index access as a modulo
operation on the length of the bit vector. That is:

    actual_index = index % vector_length

In the case of a fixbv this could be extended by taking into account
the position of the fractional "dot" on the vector as follows:

    actual_index = (index + dot_position) % vector_length

Of course we could just disallow going beyond the limit in the fixbv
case, but the definition would be the same in both classes.

Cheers,

Angel