Re: [myhdl-list] fixed-point thoughts : part one

[Christopher F. <chr...@gm...>]

On 8/23/13 7:07 AM, Martin Thompson wrote:
> Christopher Felton <chr...@gm...> writes:
>
> <snip>
> This sounds like an excellent addition to MyHDL's capabilities...
>
>> Example:
>> 	s : sign bit
>> 	i : integer bits
>> 	f : fractional bits
>>
>> 	siii.ffff
>>
>
> I have in the past needed values of this form:
>
> s0.00fff
>
> i.e. three bits of precision representing a small range either side of zero
>
> when using Xilinx System Generator there was not a convenient way to
> represent them using their fixed-point types other than using integers
> and remembering to shift them.
>
> It would be nice if your proposal could represent these types of numbers too.
>
> Would an initialiser of this form work I wonder?
>
>   	x = fixbv(0.033, min=-0.25, max=0.25, res=0.001)

Most definitely, I didn't explicitly call it out but
the proposal intends to support your example or

     x = fixbv(0.033)[4,-2,5]

This is similar to how VHDL and SystemC fixed pkgs
allow negative integer and fractional widths.

Less resolution with small word-widths would also
be supported

    # siiii0000.0
    x = fixbv(34, min=-256, max=256, res=16)

Regards,
Chris