Re: [myhdl-list] AttributeError in 0.8-dev but not in 0.7
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From: Jan D. <ja...@ja...> - 2013-02-24 21:05:31
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On 01/24/2013 03:39 PM, Per Karlsson wrote: > Yes, I think you're right! It is mixing intbv[1:0] and bool that > causes it. > > If that is to be forbidden, there needs to be an assert as soon as > possible. But I don't see why we should disallow it. The reason I > didn't see it sooner was that the bool and the intbv were > instantiated in separate modules. And unless we ban one-bit intbvs or > bools outright I don't see what you mean here. You could just use intbv[0] to assign to a boolean Signal. I don't see how that sort of thing can be avoided. One > hardware designer's bool is another's one bit integer. :) /Per We are talking about intbv versus bool. Intbv also has a "bit-vector" meaning. To me, a bit-vector with a width 1 is just a degenerated vector, not the same as a single bit variable/signal. In VHDL it is also like that - therefore if we start changing this there will be all kinds of tricky issues after conversion. For single bit variables/Signal, the idiomatic MyHDL way is bool, not intbv[1:0], which looks like a user error to me. I agree that there is should be a direct error check to prevent assigning an intbv[1:0] to a bool Signal however, so that the issue if flagged early on. Jan -- Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com Python as a HDL: http://www.myhdl.org VHDL development, the modern way: http://www.sigasi.com World-class digital design: http://www.easics.com |