Re: [myhdl-list] AttributeError in 0.8-dev but not in 0.7

[Christopher F. <chr...@gm...>]

On 1/23/13 4:15 PM, Per Karlsson wrote:
> Hi!
> There is probably something fishy about the lines 184-192 in _Signal.py
> in 0.8dev
> With 0.8-dev I get:
>      File [...]/_Signal.py", line 195, in _update
>      self._val._val = next._val
> AttributeError: 'bool' object has no attribute '_val'
> With 0.7 it works fine. Also toVerilog works fine in both 0.7 and
> 0.8-dev and iverilog cosimulation passes.
>
> I have not been (immediately) able to reproduce the error outside of the
> project (which I'm afraid I can't show you), but I have pinpointed the
> lines that cause the error. They are perfectly ordinary. (if b==0:
> a.next = 1 basically)
>
> When I debug I see that 'next' is a bool and val is an 'intbv', whereas
> normally both are 'intbv'.
>
> I know this is a bit vague, but perhaps Jan can recall what he was doing
> in May 2011 and figure it out. :)
> /Per
>
> ps. Anyone got any general tips for myhdl debugging?
>
>

I was not able to reproduce the error that fits the
description.  I believe you were referring to line 187
in the following view:

http://hg.myhdl.org/cgi-bin/hgwebdir.cgi/myhdl/file/7869342e341a/myhdl/_Signal.py

The /self._val._val = next._val/ is correct, it says
assign the /Signal.intbv._val/, the _val of the signal
is an intbv (per the check right before).

I thought a /Signal(intbv).next = bool/ might cause
the error but the following code snip works fine in
0.8-dev

     import myhdl
     print(myhdl.__version__)
     from myhdl import *
     x = Signal(intbv(0, min=-8, max=8))
     print(repr(x)); assert x == 0
     x.next = 1
     x._update()
     print(repr(x)); assert x == 1
     x.next = intbv(4)[3:]
     x._update()
     print(repr(x)); assert x == 4
     x.next = bool(1)
     x._update()
     print(repr(x)); assert x == True
     x.next = Signal(bool(0))
     x._update()
     print(repr(x)); assert x == False
     x.next = Signal(intbv(-3, min=-16, max=5))
     x._update()
     print(repr(x)); assert x == -3

or similar run through the simulator

     x = Signal(intbv(0, min=-8, max=8))
     def test_next():
         @instance
         def tb_test():
             x.next = 1
             yield delay(2)
             x.next = True
             yield delay(2)
             x.next = False
             yield delay(2)
             x.next = intbv(4)[3:];
             yield delay(2)
             x.next = -6
             yield delay(2)
         return tb_test
     Simulation(test_next()).run()


Regards,
Chris Felton