Re: [myhdl-list] Next Python to VHDL generator by using LLVM

[David B. <dav...@ya...>]

The reason as to why this needs to be looked at is that if you want to support higher level functionality of the python language to support synthesizable HDL designs the current method is to to use a subset of the python language.  What I am talking about is the possibility of extending MyHDL capabilities of supporting ALL if not most of the higher level functionality of the python language to support advanced designs in synthesizable HDLs.  Take a look at Trident C programmingl language with LLVM support.  It supported close to 98 percent of C functionality for directed and efficient synthesizable HDL design.  
 
Please take a look at the following link:
 
http://trident.sourceforge.net/
 
This is for the C language but I wonder if an equivalent system could not be developed by using python as the central controlling programming language instead of C.  LLVM stands for low level virtual machine language that allows the expression of one language, this case python, to be implemented on an entirely different architecture (FPGAS instead of a von-neumann architecture).  
 
Any feedback or questions is more than appreciated !!!
 
David
 


--- On Tue, 1/15/13, Christopher Felton <chr...@gm...> wrote:


From: Christopher Felton <chr...@gm...>
Subject: Re: [myhdl-list] Next Python to VHDL generator by using LLVM
To: myh...@li...
Date: Tuesday, January 15, 2013, 1:00 PM


On 1/15/2013 11:45 AM, David Blubaugh wrote:
>
>
>
>
>
> To All,
>
> I was wondering if someone has looked in the use of the LLVM to be able to generate full featured python into synthesizable VHDL with simulation support of course ??
>
> I STRONGLY BELIEVE YOU GUYS NEED TO LOOK AT LLVM for greatly enhancing MyHDL to support a greater domain of the python language to support synthesizable designs and testbench support.
>
> David Blubaugh
>
>
>
>
>

I completely disagree this is *not* something the MyHDL
group should be interested in.  There would be no benefit
for the MyHDL folks to look at this.

In addition, other than a buzz word you didn't provide
any technical arguments why this would be desirable.

Regards,
Chris



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