[myhdl-list] VHDL Cosim Initial Thoughts
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jandecaluwe
From: Daryl W. <dw...@ou...> - 2013-01-04 20:55:59
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Okay, I have read through _Cosimulation.py, _Simulation.py, and myhdl_vpi.c, and Jan's description here: http://www.myhdl.org/doc/0.7/manual/cosimulation.html I think I have a grasp on what the Verilog simulator is doing during cosimulation: Basically, run the simulation, schedule a callback that occurs when all signals are in steady-state, make successive callbacks to simulate Delta cycles from VHDL, and use delay callbacks to make sure the simulation times match up. At least if I'm interpreting everything correctly... I don't think this exact method will work with the ModelSim Foreign Language Interface (FLI) since it appears to me that some of these call backs are missing. However, I do see an easier/compatible option I think... My thoughts: The FLI allows one to register a VHDL process, create signals, assign a sensitivity list to the process, and read/drive signals from C. My plan (barring any problems in my interpretation so far) is to programmatically create a "MyHDL" process in the simulator with all of the from_myhdl signals in its sensitivity list, and read all of the output to_myhdl signals whenever this process is triggered and send them back to the Cosimulation object. These may be defined in the VHDL interface file somehow or else creating using FLI... I'm still working out details there. Also, I haven't yet figured out how to deal with delays from the MyHDL testbench (which will be important for sure)... But I'm sure I will find a way soon. In addition, I am opting to subclass Cosimulation as CosimulationWithSockets. This would override the methods of Cosimulation and modify them to implement their interprocess communication through network sockets instead of the pipes that are used now. This would allow the interprocess communication to occur over a network (letting me work on my laptop while running the simulation on a server for example). Also, it adds local cosimulation functionality to windows (via localhost) without Cygwin (with some performance loss maybe). It should work equally well (with appropriate preprocessing directives) under Windows, Unix/Linux, or Mac OS X. I've done some preliminary testing connecting python code to C code using sockets. So it looks like this is feasible. Any comments/questions/ideas are welcome. Thoughts and feedback on pros/cons of this approach would be greatly appreciated. Also, would this be useful for anyone else? If so, I'll post code once I have it working. Once I have something that I believe is working, I'll test it by running the tests in the cosimulation directory (appropriately modified and using VHDL). Thanks for any feedback, Daryl |