Re: [myhdl-list] Handling combinational code

[Christopher F. <chr...@gm...>]

On 12/3/12 5:35 AM, Angel Ezquerra wrote:
> Hi,
>
> when writing VHDL code it is common to write combinational statements
> outside of processes. For example, I've got the following VHDL code
> that I wanted to rewrite using MyHDL:
>
>
<snip>
> The code in question is not very important. The important part is the last line:
>
>      output <= sync1 xor sync2;
>
> My question is, what is the most "idiomatic" way to handle this sort
> of statement in MyHDL? So far what I've done is creating an
> "always_proc" process called "combinational" in which I dump all
> statements that I would usually place outside all processes in the
> equivalent VHDL code. That is, in the example:
>
>      @always_comb
>      def combinational():
>          output.next = sync1 ^ sync2
>
> The MyHDL toVHDL converter seems to handle this fine and in fact it
> places these statements outside all processes as well.
>
> Is this the right/recommended way to handle this? The only drawback
> that I see is that it makes it harder to place these sort of
> statements close to the processes that are related to them, which may
> make the code a little harder to understand. I guess that I could
> solve that by creating multiple "combinational" always_proc
> generators, each located near the processes where the combinational
> inputs or outputs are used. Would that be a good solution?

Yes, that is the suggested method.  I create multiple always_comb I 
don't use one large one to capture all.

Regards,
Chris