Re: [myhdl-list] TypeError: Unexpected type with toVerilog

[Jan C. <jan...@mu...>]

On 30/05/12 16:04, Jan Decaluwe wrote:
> On 05/30/2012 01:20 AM, Jan Coombs wrote:
>> On 29/05/12 20:53, Jan Decaluwe wrote:
>> . . .
>>> This is the hopefully clearer error message I just created
>>> in both branches.
>> Thanks, I like MyHDL like a long-lost friend, and hope to make much more progress together.
>>
>> Attached is simplified the test code, as there still seems to be a problem.
>
> Same problem: a undriven enum signal, not supported currently.
>
Wat zeg ye?  Looks like double-dutch to me:)

Groenten uit engeland, Jan.