Re: [myhdl-list] TypeError: Unexpected type with toVerilog

[Christopher F. <chr...@gm...>]

>>
>>> This is *not* the error that I reported earlier, that the enum cannot be
>>> used in an /always_comb/.
>>
>> To make progress, I need a simple (one-file) test that *fails*
>> when I run it without me having to make any change (which could
>> mask the problem you want address). I'll take it from there.
>>
>
> That was the original intent, it is that time management issue.  I will
> see what I can pull together in the next couple days.
>

Attached is a set of tests for the enum, run using py.test

    >> py.test test_enums.py
    ============ test session starts ==========
    -- Python 2.7.3 -- pytest-2.2.3
    collected 6 items

    test_enums.py .F.F..
    ... (lots-o-info)

It runs 6 tests on 4 version of a similar design.  The first two 
(TrafficOne and TrafficTwo), best of my knowledge, should simulate and 
convert.  The second raises an error during conversion.

The second failure is the issue briefly discussed where in a synchronous 
description conversion is successful where it should raise a 
ConversionError (because the converted code simulation will not match 
the MyHDL simulation).

Unfortunately, this example has quite a bit of code.  I didn't have the 
creative bug to generate a short-n-sweet version that covered all the 
items discussed in this thread.

Regards,
Chris