[myhdl-list] Jan Coomb's Processor

[Christopher L. <loz...@fr...>]

It looks like you have made huge process on this device.  Not only in
MyHDL, but also in forth.   Congratulations on the hard work. 

I like that you list the components, RAM, CPU, Stack, ALU.  Goes a long
way to explaining what you have built. Of course code is always painful
to read through, English high level description is always easier and
faster to read.  The article on a forth processor in FPGA looks hugely
interesting.  What is your relationship with the author?

I did not understand the table at the top of your web page.  What are
the horizontal and vertical axes?

So let me ask the obvious marketing questions.  How many transistors are
in this device?  How many in the 8051?  Better yet, how many in each
component, where did you shrink it the most?   And how many instructions
per second can each execute.   Which component slows you down the most? 
Obviously this is on a FPGA, the other on silicon, so one needs to scale
between them.

Many many years ago, Marvin Minsky, an AI professor at MIT tried to
build a slower cpu.  A bit embarrassing.  He does not talk about it very
much.  But a smaller, more power and space efficient cpu is a great idea. 

So how much better is this device?  Of course the real test are the
benchmarks.


Regards
Chris







-- 
Regards
Christopher Lozinski

Check out my iPhone apps TextFaster and EmailFaster
http://textfaster.com

Expect a paradigm shift.
http://MyHDLClass.com:8080