Re: [myhdl-list] Example of MyHDL for Python Developers Documentation

[Christopher F. <chr...@gm...>]

On 5/3/2012 3:23 PM, G. Andrew Stone wrote:
> Hi Jan,
>
> Let me try to say it in another way.  Please forgive any inaccuracies; its
> been a few years! :-)
>
> If my synthesizable hardware description was put in a simulation black box
> (call it "hdl") with some simple API that could be used like:
>
> hdl.start()
> for time in range(1,whatever):
>    output_signals = hdl.next(list_of_input_signals)
>
> then as a software engineer I'd completely understand how to write a
> complex simulation and testbench around it.  For example, if my "hdl"
> object defined a PCI bus card I could pretty easily write Python code that
> jams in a bunch of fake PCI requests and make sure the right stuff comes
> out.  I could easily make up code that runs a bunch of these black boxes
> simultaneously and use unsynthesizable python to "glue" them together to
> make a larger system -- thereby simulating a subset of some larger system.
> I could even have each black box "running" at different clock speeds.  Or I
> could even hook the simulation black box up to the actual code that will
> run on a CPU and talk to my FPGA.
>
> So I (as a software professional) don't need myHDL to help me do that.
> What I need is it to help me with is what's inside that black box.  But the
> docs (but please remember my heavy use was several years ago) keep trying
> to teach me how to do the testbench part.  This confused me because I kept
> thinking I was writing synthesizable code.
>

I don't understand where the confusion comes from?  Both Python and 
MyHDL are tools -languages/tools- that help us build *things* as you 
suggest.

Example, I have a verification framework that I use for building and 
verifying DSP modules.  This has a mix of non-HDL blocks and HDL blocks. 
  Here is a brief preview.

     from myhdl import Simulation
     import blocks
     from filters import MyFilter
     sine1 = blocks.sources.Sine(frequency=40e3, sample_rate=1e6)
     sine2 = blocks.sources.Sine(frequency=30e3, sample_rate=1e6)
     a1 = sine1 + sine2
     flt = MyFilter(a1)
     plot1 = blocks.sinks.Plotter(sine1, sine2, a1, flt)
     v1 = blocks.sinks.VerifySequence(flt, exact=False, vfunc=vfunc)
     Simulation(blocks.GetAllGenerators()).run()

This simple example verifies the expected output of the HDL filter.  OO 
design was used heavily in this framework.  MyHDL and Python are at the 
core, the technologies that enabled me to build such an environment. 
Without MyHDL's objects, functions, and *quality* I would have had to do 
a ton more work (which would have made it non-feasible).  MyHDL enables 
me to have a competitive advantage!

I have had to build, what feels like thousands of simulation models over 
the years, everything from C/C++/SystemC, HDLs, Matlab, etc.  Some of 
these were non-HDL models, others mixed, and others pure HDL.  But 
nothing has been more efficient to develop than Python/MyHDL!  And now 
with the performance improvements I get to watch colleagues never meet a 
schedule and the one weak argument they had ... is irrelevant.

Here is another example:

     @instance
     def tb_stimulus():
        # Write Wishbone memory mapped device
        yield fx2Model.WriteAddress(0x0101, 1)
        yield fx2Model.WriteAddress(0x0103, 0xAA)
        yield fx2Model.ReadAddress(0x0103, rbuf)
        [fx2Model.Write(data, fx2Model.EP4 for dat in test_data1]
        # Wait for the data to transfer
        yield fx2Model.IsEmpty(fx2Model.EP4)
        ...
        raise StopSimulation

In this example I have a model with "transactors".  The transactors 
bridge my event driven model world to the HDL world.

I guess from my point of view you can build frameworks with the 
interfaces you might want.  And these interfaces might be different for 
each problem to solve.

Regards,
Chris