Re: [myhdl-list] How to make MyHDL Object-Oriented

[Christopher F. <chr...@gm...>]

On 5/4/12 8:34 AM, Tom Dillon wrote:
> It seems to me we are just being drawn into ridiculous conversations.
>
> I am more productive with MyHDL/Python and Verilog/VHDL that with only
> straight Verilog/VHDL, so I use it.
>
> Particularly for test benches and re-usable IP modules. I would suggest
> to anyone who wants to learn the benefits of MyHDL, that begin with test
> benches. It is a great way to increase your test coverage and do it in
> far less time than with an HDL test bench.
>
> After some experience is gained using MyHDL, your comments about what
> can and can't be done with it might be more useful to the list.
>
> Right now debating whether or not you can use classes is absurd.
>
>

+1 Tom has many good point here!