Re: [myhdl-list] When to use @always, @instance and @always_comb

[Jan D. <ja...@ja...>]

On 05/02/2012 08:52 PM, Uri Nix wrote:
> IMHO it /is/ confusing, since the previous topics in the chapter are
> synthesis oriented.
>
> I have had very good experience with MyHDL for system modelling,
> which uses a different mindset than the FPGA direction. It is
> amazingly powerful, follows similar idioms as in SystemC with the
> ease of Python, and might use some more mention.

Point taken. What I could easily do of course is break up the
three sections in separate chapters. Then add an intro to the
chapter making it explicit that RTL is for synthesis, and
high-level modeling not. In fact, the content is bound
to grow in future releases so breaking this up seems good
for clarity anyway.


-- 
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
     Python as a HDL: http://www.myhdl.org
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