Re: [myhdl-list] When to use @always, @instance and @always_comb

[Christopher F. <chr...@gm...>]

On 5/2/12 6:48 PM, Tom Dillon wrote:
> On 05/02/2012 06:30 PM, Christopher Lozinski wrote:
>> On 5/2/12 3:58 PM, Christopher Felton wrote:
>>> On 5/2/2012 1:52 PM, Uri Nix wrote:
>>>> IMHO it /is/ confusing, since the previous topics in the chapter are
>>>> synthesis oriented.
>>> The manual under "Modeling techniques" currently progresses; structural,
>>> RTL, High-level.  Do you think a top-down versus bottom-up order would
>>> be better?  Someone *without* a HW design background may find;
>>> High-level, RTL, structural order less confusing?  Or, in your opinion,
>>> do you think it needs to be a completely separate chapter?
>> It is still all not clear to me.  I am not sure about top down or bottom
>> up.  There are two different target markets, the experienced hardware
>> designers, and the experienced software developers.  I can only speak
>> for the later.
>>
>> I would love to see it structured more as a tutorial on hardware design
>> than as a class on MyHDL.  Start with a flip flop, maybe that is a
>> structural example progress to a more complex digital circuit, say a
>> clock, maybe that is RTL, and then onto High Level.    In particular I
>> would love to see a hardware example of when you use @always, @instance
>> and @always_comb.  Why are there only 3 decorators???? I think I
>> understand it, but I keep getting it wrong.  And then at a certain
>> point, say okay here is more stuff you can model, but that you cannot
>> synthesize.  Better yet, say this is more stuff you can model, but
>> cannot use to create an FPGA.  And I would love to add my section on
>> what you cannot synthesize to the docs.  In fact I would love to move
>> all or part of my wiki onto MyDHL.org
>
> Am I missing something here, why would the MyHDL documentation be
> expected to teach hardware design?
>
> Last week I used a Python package to allow me to read/write an Excel
> spreadsheet. I did not expect the documentation for that package to
> teach me how to use Excel. Why would it?
>

You are absolutely correct!  The MyHDL manual should not be expected to 
teach hardware design, hardware verification, system modeling, hardware 
modeling etc.  Or what an FPGA or IC's are or how to design them.

Regards,
Chris