Re: [myhdl-list] Migen logic design toolbox - now with simulator

[Sébastien B. <seb...@mi...>]

On 03/21/2012 12:23 PM, Jan Decaluwe wrote:
> Because I think you missed the break, didn't you?

Yes I did, see my next email.

> Of course,
> I can't tell for sure because who knows how you handle the
> statement order in that list.

Just like Verilog/VHDL - last statement sets the value.

Sébastien