Re: [myhdl-list] Migen logic design toolbox - now with simulator

[Christopher L. <loz...@fr...>]

On 3/18/12 5:10 PM, Jan Decaluwe wrote:
> The relevant feature is whether events are explicit (VHDL, Verilog, MyHDL)
> or implicit (Migen et al). In practice, all HDLs with explicit events
> that I know of support procedural semantics, and none of the HDLs
> with implicit events that I know of do so.
>
> In particular, Migen has concurrent semantics only. The lack of
> procedural semantics is a showstopper.
>
Thank you so much Jan.  This is what I was looking for.  A very high
level view of what the difference is between the two approaches.   Let
us see if the Migen people agree with your characterization. 

Actually in my case, I think I am only interested in the concurrent
semantics, not the procedural ones so I will
now go and take a closer look at the Migen documents.   I could be
wrong.  As I get into detailed designs, perhaps I will also need the
procedural approach.   Maybe I will even switch back and forth a few times.

In any case I would like to thank you for allowing the Migen people to
speak on this list.  I certainly learned a lot from the back and forth
debate.  From the global perspective, the guys trying to design chips
with python are a single group of people.  And I understand that if you
are a hardcore Migen or MyHDL person, they appear to be two different
communities. 

-- 
Regards
Christopher Lozinski

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