Re: [myhdl-list] can MyHDL help?

[Christopher F. <chr...@gm...>]

On 2/1/2012 6:41 AM, Tim Brooks wrote:
>>> Python also has sockets but I can't imaging it would be easy to tell it
>>> to send and receive packet to the myhdl test bench would it?...
>>
>> Well that's the point of MyHDL - it is easy. Just mix the socket
>> functions with the rest of the testbench code.
>>
> really? I wouldn't say easy - from googling around it, I think it would
> involve creating a pseudo Ethernet device and binding the socket to
> that device. The testbench would read and write Ethernet frames from/to
> that device. a little beyond my python/unix skills at the moment.
>> For co-simulation, I don't think there's support for any VHDL simulator
>> today (not even GHDL), is there?

"Easy" is Sebastien's brash way of saying straight-forward.  It might 
take some coding to create the _transactor_ that receives the packets 
over a socket and convert them to a bus driver (e.g. MII, GMII) but 
there should be no limitation in doing so.  If you were able to create a 
Python module that listened for a socket connection and could connect 
externally.  At that point you could translate the received packet 
information into the bus transactor. You might have to add some of the 
lower-level TCP/IP wrappers depending what level you are testing.

>
> Shame...

As far as VHDL cosimulation simulator support it is nil.  iSIM does not 
have PLI/VPI/VHPI/DPI support.  It will not be possible to use iSIM for 
cosimulation.  GHDLs VHPI support is limited and in an unknown state. 
There have been some experiments ...
http://www.myhdl.org/doku.php/dev:vhdl_cosim

In the past there has been, either limited access to a VHDL simulator 
with mature VHPI support to develop VHDL cosimulation or little interest.

If you want to start an initiative to investigate or build the VHPI 
interface to a simulator with mature/stable VHPI I will be happy to 
assist.  Otherwise, I don't believe there is anyone with cycles to 
complete cosimulation with a VHDL simulator.  Best of my knowledge 
Modelsim and Active-HDL both have decent VHPI support.  I believe the 
free Modelsim with the Altera tools could be used to develop the 
VHDL-VHPI interface.

Regards,
Chris