[myhdl-list] yield before the end of a simulation
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From: Oscar D. <osc...@gm...> - 2011-12-20 11:35:47
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Hi I have a testbench that needs to do some asserts at the end of a simulation. However, I couldn't find an elegant way to do it. Right now I'm passing to the testbench generator the same duration as in "Simulation.run(duration)" , so I can do a "yield delay(duration-1)" and do the final asserts (by the way, in my case all my simulations have a defined duration). I tried to catch the StopSimulation exception, but it doesn't work inside a generator. Any ideas? Thanks! Best regards -- Oscar Díaz Key Fingerprint = 904B 306C C3C2 7487 650B BFAC EDA2 B702 90E9 9964 gpg --keyserver subkeys.pgp.net --recv-keys 90E99964 I recommend using OpenDocument Format for daily use and exchange of documents. http://www.fsf.org/campaigns/opendocument |