Re: [myhdl-list] Bug in MyHDL compiler?
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From: Jan D. <ja...@ja...> - 2011-09-28 08:50:39
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On 09/27/2011 06:25 PM, David Greenberg wrote: > Hi Jan, I'm trying to make register file that returns a read and > write function, the former which will be synthesized as a verilog > function and the latter as a task. I don't want to have to explicitly > pass around the register file's signals. Does that make sense? The proper way to implement such functionality would seem to be classes and methods, not passing functions around explicitly. (Supporting that in conversion is a different matter.) -- Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com Python as a HDL: http://www.myhdl.org VHDL development, the modern way: http://www.sigasi.com World-class digital design: http://www.easics.com |