Re: [myhdl-list] A Reviewers Thoughts ...

[Christopher F. <chr...@gm...>]

<snip>
>
> Again, I am not trying to argue if in-system debugging is useful or not
> but instead arguing that including in-system debugging in the design is
> a better approach.  Which removes the need to add probes to the
> post-P&R.  And such, minimizes the argument that the flat file
> conversion is a negative.
>
>
> Chris
>

Thinking about this a little more, one possible downside, I can think 
of, is how a flat hierarchy might effect floor-planning.  Some FPGA and 
IC designs might want (require) floor-planning*.  But I am not really 
sure of this either because the blocks are named blocks and the tools 
might be able to handle this as well.

Chris

* Floor-planning is a "flow" to guide the P&R (place-and-route) tools by 
defining physical constraints.  Often this is done by indicating a 
region for placement of a block, often a major block.