Re: [myhdl-list] It should be possible to use a @process decorator wherever you can use @always
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jandecaluwe
From: Jan D. <ja...@ja...> - 2011-06-05 22:42:11
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On 06/05/2011 02:44 PM, Angel Ezquerra wrote: > > Jan, > > I understand your reasoning and I don't really disagree with it. Going > through your previous email I also understand why you chose the word > "always" rather than "process". However I find that a bit unfortunate > for two reasons: > > - The MyHDL syntax has (in my humble and very inexperienced opinion) > more of a VHDL look than a Verilog look. I cannot agree with that. The syntax is Python's. > I think that you have > strengthened that opinion with your recent blog posts in which you > criticized the way that Verilog "signals" work, compared to VHDL. It > is thus a bit unexpected that the basic building block of MyHDL is > named after a Verilog construct rather than a VHDL one. First, thanks for reading my blog posts. The blog posts that your refer to are about nondetermism and how to handle it in the language (or not). Therefore they are about semantics, not syntax. The basic building block in VHDL to avoid nondeterminism is a signal, and that is available under the same name in MyHDL. The issue of sensitivity is unrelated to nondeterminism. However, it is closely related to the semantics of process/always, as I argued in another post. But that was not the subject of my blog posts, and I consider it much less important than the issues of nondetermism. More in general: my blog posts are part of a personal analysis of HDL-based design. I will probably need a couple of years to say everything I want to say. The issues are subtle. I may have strong opinions and heavily criticize a particular aspect, but that does not mean I am completely "anti" a particular HDL. > - I personally find the word "always" quite disconnected from its > intended purpose (both in Verilog and in MyHDL), while I find the word > "process" much closer to what a MyHDL generator represents. Personally, I think it's one of Verilog's better choices: "always when this or that happens, do the following" Jan -- Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com Python as a HDL: http://www.myhdl.org VHDL development, the modern way: http://www.sigasi.com Analog design automation: http://www.mephisto-da.com World-class digital design: http://www.easics.com |