Re: [myhdl-list] Using MyHDL with existing infrastructure

[Christopher F. <chr...@gm...>]

<snip>
>
> One important aspect I'd like to preserve is the ability to place a top
> level port intended to be connected to the PowerPC deep within the
> hierarchy of the design without having to bring the signals all the
> way to the top level explicitly. I haven't seen a way to do this in
> MyHDL, but it seems like it should be possible since the resulting
> VHDL ends up with a flattened hierarchy anyway.
>
> I appreciate any suggestions. I'm happy to clarify anything that
> might be confusing.
>
> Thanks in advance,
> Glenn
>

Here is a small example to achieve what (I think) you are describing. 
More information can be found here,
http://www.myhdl.org/doc/current/manual/conversion_examples.html#conv-usage-custom

from myhdl import *

def BurriedInstance(clk, rst, data_in, data_out):

     # ... Some Code
     bi = nativeInstance(clk, rst, data_in, data_out)
     # ... Some More Code

     return bi  #other generators

def nativeInstance(clk, rst, data_in, data_out):

     @always(clk, rst, data_in)
     def pass_thru():
         pass
     data_out.driven = "wire"

     nativeInstance.vhdl_code = """
     P1:ppc port map($clk, $rst, $data_in, $data_out);
     """

     return pass_thru


if __name__ == '__main__':
     clk = Signal(False)
     rst = Signal(False)
     data_in  = Signal(intbv(0)[8:])
     data_out = Signal(intbv(0)[8:])
     toVHDL(BurriedInstance, clk, rst, data_in, data_out)


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